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    PULSE OUTPUT CIRCUIT AND SEMICONDUCTOR DEVICE
    13.
    发明申请
    PULSE OUTPUT CIRCUIT AND SEMICONDUCTOR DEVICE 有权
    脉冲输出电路和半导体器件

    公开(公告)号：US20140002426A1

    公开(公告)日：2014-01-02

    申请号：US13922685

    申请日：2013-06-20

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yoshifumi TANADA ,  Manabu SATO ,  Hiroyuki MIYAKE ,  Toshinari SASAKI ,  Kenichi OKAZAKI ,  Junichi KOEZUKA ,  Shunpei YAMAZAKI

    IPC: H03K3/01

    CPC classification number: H03K3/01 ,  G09G3/3688 ,  G11C19/28

    Abstract: A highly reliable semiconductor device in which a shift in threshold voltage of a transistor due to deterioration can be inhibited is provided. A pulse output circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor. A clock signal is supplied to a drain of the first transistor. A first power supply potential is applied to a source of the second transistor, and a drain of the second transistor is connected to the drain of the first transistor. A second power supply potential is applied to a drain of the third transistor. The first power supply potential is applied to a source of the fourth transistor, and a drain of the fourth transistor is connected to the drain of the third transistor. The first power supply potential is applied to a source of the fifth transistor, and a drain of the fifth transistor is connected to a gate of the third transistor. One of a source and a drain of the sixth transistor is connected to the drain of the first transistor, and the other of the source and the drain of the sixth transistor is connected to the gate of the third transistor. The first transistor and the third transistor include back gates connected to each other. The first to sixth transistors have the same conductivity type.

    Abstract translation: 提供了一种高可靠性的半导体器件，其中可以抑制由于劣化导致的晶体管的阈值电压偏移。 脉冲输出电路包括第一晶体管，第二晶体管，第三晶体管，第四晶体管，第五晶体管和第六晶体管。 时钟信号被提供给第一晶体管的漏极。 第一电源电位施加到第二晶体管的源极，第二晶体管的漏极连接到第一晶体管的漏极。 第二电源电位被施加到第三晶体管的漏极。 第一电源电位被施加到第四晶体管的源极，并且第四晶体管的漏极连接到第三晶体管的漏极。 第一电源电位施加到第五晶体管的源极，第五晶体管的漏极连接到第三晶体管的栅极。 第六晶体管的源极和漏极之一连接到第一晶体管的漏极，第六晶体管的源极和漏极中的另一个连接到第三晶体管的栅极。 第一晶体管和第三晶体管包括彼此连接的后栅极。 第一至第六晶体管具有相同的导电类型。

    SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE
    17.
    发明申请
    SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE 有权

    公开(公告)号：US20230125324A1

    公开(公告)日：2023-04-27

    申请号：US17773168

    申请日：2020-11-20

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Manabu SATO ,  Susumu KAWASHIMA ,  Koji KUSUNOKI ,  Hidenori MORI ,  Hironori MATSUMOTO ,  Daisuke KUROSAKI ,  Masami JINTYOU ,  Masataka NAKADA

    IPC: H01L27/12 ,  H01L29/786

    Abstract: A semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a capacitor, and first to fourth wirings. The first transistor includes a first gate and a second gate, and one of a source and a drain of the first transistor is connected to the first wiring and the second gate, and the other of the source and the drain is connected to one of a source and a drain of the second transistor and one electrode of the capacitor. A gate of the second transistor is connected to the other electrode of the capacitor, and the other of the source and the drain of the second transistor is electrically connected to the second wiring. The first wiring is supplied with a first potential, and the second wiring is supplied with a second potential and a third potential alternately. The third wiring is connected to the first gate and supplied with a first signal. The fourth wiring is connected to the gate of the second transistor and supplied with a second signal obtained by inverting the first signal.

    DISPLAY DEVICE
    18.
    发明申请
    DISPLAY DEVICE 有权

    公开(公告)号：US20210072605A1

    公开(公告)日：2021-03-11

    申请号：US17082094

    申请日：2020-10-28

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Masatoshi YOKOYAMA ,  Shigeki KOMORI ,  Manabu SATO ,  Kenichi OKAZAKI ,  Shunpei YAMAZAKI

    IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1343

    Abstract: To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.

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