公开(公告)号：US20210003877A1

公开(公告)日：2021-01-07

申请号：US17026702

申请日：2020-09-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Ryo HATSUMI ,  Daisuke KUBOTA ,  Hiroyuki MIYAKE

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1343

Abstract: A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.

公开(公告)号：US20200176486A1

公开(公告)日：2020-06-04

申请号：US16780034

申请日：2020-02-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  G11C19/28 ,  G09G3/20 ,  H01L29/45 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417 ,  H01L29/04

Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.

公开(公告)号：US20200174303A1

公开(公告)日：2020-06-04

申请号：US16784640

申请日：2020-02-07

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Ryo HATSUMI ,  Daisuke KUBOTA ,  Hiroyuki MIYAKE

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1343

Abstract: A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.

公开(公告)号：US20200058682A1

公开(公告)日：2020-02-20

申请号：US16662394

申请日：2019-10-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Hiroyuki MIYAKE ,  Hideaki KUWABARA ,  Tatsuya TAKAHASHI

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  H01L29/45

Abstract: An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.

公开(公告)号：US20200033991A1

公开(公告)日：2020-01-30

申请号：US16594419

申请日：2019-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki MIYAKE

IPC: G06F3/041 ,  G09G3/36 ,  G02F1/1333

Abstract: Provided is a novel touch panel that is highly convenience or reliable, a novel data processor that is highly convenient or reliable, a novel touch panel, a novel data processor, or a novel semiconductor device. The touch panel includes a sensor element and a display element. The sensor element includes a first conductive film and a second conductive film. The display element includes a layer containing a liquid crystal material and a third conductive film which is provided so that an electric field controlling the alignment of the liquid crystal material contained in the layer can be applied between the first conductive film and the third conductive film.

公开(公告)号：US20190339743A1

公开(公告)日：2019-11-07

申请号：US16516730

申请日：2019-07-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki MIYAKE ,  Hisao IKEDA

IPC: G06F1/16 ,  H01L51/00 ,  H01L27/32 ,  H01L51/52 ,  H01L23/00

Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.

公开(公告)号：US20190252889A1

公开(公告)日：2019-08-15

申请号：US16387760

申请日：2019-04-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Minoru TAKAHASHI ,  Junpei MOMO ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI

IPC: H02J7/00 ,  B60L50/15 ,  B60L53/10 ,  B60L58/25 ,  H01M10/44

CPC classification number: H02J7/007 ,  B60L50/15 ,  B60L53/11 ,  B60L58/25 ,  B60L2200/26 ,  B60L2240/36 ,  B60L2240/545 ,  H01M4/5825 ,  H01M4/587 ,  H01M10/0525 ,  H01M10/443 ,  H01M2300/0037 ,  H02J7/0073 ,  H02J7/0091 ,  Y02E60/122 ,  Y02T10/7011 ,  Y02T10/705 ,  Y02T10/7072 ,  Y02T10/7077 ,  Y02T90/121 ,  Y02T90/128 ,  Y02T90/14

Abstract: A lithium ion secondary battery includes a positive electrode including a positive electrode active material layer containing lithium iron phosphate, a negative electrode including a negative electrode active material layer containing graphite, and an electrolyte including a lithium salt and a solvent including ethylene carbonate and diethyl carbonate between the positive electrode and the negative electrode. When the battery temperature of the lithium ion secondary battery or the temperature of an environment in which the lithium ion secondary battery is used is T and given temperatures are T1 and T2 (T1

公开(公告)号：US20190035818A1

公开(公告)日：2019-01-31

申请号：US16130550

申请日：2018-09-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/24 ,  H01L29/04 ,  H01L27/088 ,  H01L21/02

Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.

公开(公告)号：US20190006393A1

公开(公告)日：2019-01-03

申请号：US16039869

申请日：2018-07-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Kenichi OKAZAKI ,  Masahiko HAYAKAWA ,  Shinpei MATSUDA

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1343 ,  G02F1/1368

Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.

公开(公告)号：US20180315780A1

公开(公告)日：2018-11-01

申请号：US16026115

申请日：2018-07-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroyuki MIYAKE

IPC: H01L27/12 ,  H01L33/62 ,  H01L27/06 ,  G09G3/3275 ,  G09G3/3233 ,  H01L27/32

CPC classification number: H01L27/1225 ,  G09G3/3233 ,  G09G3/3275 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/045 ,  H01L27/06 ,  H01L27/0629 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3241 ,  H01L33/62

Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.