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公开(公告)号：US20190259812A1
公开(公告)日：2019-08-22
申请号：US16172504
申请日：2018-10-26
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
Abstract: A cross-point array device includes a substrate, a first conductive line disposed over the substrate and extending in a first direction, a plurality of pillar structures disposed on the first conductive line, each of the pillar structure comprising a memory electrode, a resistive memory layer disposed along surfaces of the pillar structures, a threshold switching layer disposed on the resistive memory layer, and a second conductive line electrically connected to the threshold switching layer and extending a second direction that is not parallel to the first conductive line.
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公开(公告)号：US20240341206A1
公开(公告)日：2024-10-10
申请号：US18460437
申请日：2023-09-01
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
CPC classification number: H10N70/826 , H10B63/80 , H10N70/021 , H10N70/041 , H10N70/063 , H10N70/066 , H10N70/883 , G11C13/0038 , G11C13/004 , G11C13/0069
Abstract: Semiconductor devices and fabrication methods of semiconductor devices are disclosed. In an embodiment, a semiconductor device May include a plurality of memory cells, and each of the plurality of memory cells may include: a resistive layer including a material having a specific resistance and including a lower portion and an upper portion disposed over the lower portion, wherein a width of the lower portion is smaller than a width of an uppermost surface of the upper portion; a selector layer disposed over the resistive layer and structured to perform a threshold switching by exhibiting different electrically conductive states in response to an applied voltage relative to a threshold voltage; and a memory layer disposed over the selector layer and structured to store data.
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公开(公告)号：US20240172569A1
公开(公告)日：2024-05-23
申请号：US18313248
申请日：2023-05-05
Applicant: SK hynix Inc.
Inventor： Jong Min YUN , Dae Eun KWON , Soo Gil KIM , Soo Man SEO , Tae Jung HA
IPC: H10N70/00
CPC classification number: H10N70/041 , H10N70/063 , H10N70/066 , H10N70/841 , H10N70/882
Abstract: A semiconductor device may include: a first conductive line extending in a first direction; a second conductive line disposed over the first conductive line to be spaced apart from the first conductive line and extending in a second direction different from the first direction; and a selector layer disposed between the first conductive line and the second conductive line and extending in a direction crossing at least one of the first direction or the second direction, wherein the selector layer includes a trench formed on a surface of the selector layer and extending in the direction crossing at least one of the first direction or the second direction.
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公开(公告)号：US20170358743A1
公开(公告)日：2017-12-14
申请号：US15433981
申请日：2017-02-15
Applicant: SK hynix Inc.
Inventor： Hyung Woo KIM , Tae Jung HA
IPC: H01L45/00
CPC classification number: H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/146
Abstract: A resistive random access memory device is provided. The resistive random access memory device includes a first electrode, a second electrode, and an electrolyte layer disposed between the first electrode and the second electrode. One of the first electrode and the second electrode includes an ion supply layer providing two or more kinds of metal ions to the electrolyte layer. The two or more kinds of metal ions have different mobilities in the electrolyte layer. Two or more conductive bridges are generated by the two or more kinds of metal ions, respectively.
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15.发明申请公开(公告)号：US20170352807A1
公开(公告)日：2017-12-07
申请号：US15435144
申请日：2017-02-16
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
CPC classification number: H01L45/165 , H01L27/2427 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/142 , H01L45/143 , H01L45/145 , H01L45/146 , H01L45/147
Abstract: A method of manufacturing a switching element includes forming a first electrode layer over a substrate, forming a switching structure on the first electrode layer, and forming a second electrode layer on the switching structure. The switching structure includes a plurality of unit switching layers that includes a first unit switching layer and a second unit switching layer. Forming the first unit switching layer includes forming a first unit insulation layer, and injecting first dopants into the first unit insulation layer by performing a first ion implantation process. Forming the second unit switching layer includes forming a second unit insulation layer, and injecting second dopants into the second unit insulation layer by performing a second implantation process.
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Patent Agency Ranking
公开(公告)号：US20250126805A1
公开(公告)日：2025-04-17
申请号：US18767890
申请日：2024-07-09
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
Abstract: In an embodiment, a semiconductor device includes: a variable resistance pattern configured to switch between different resistance states in response to an applied voltage or current; and a selector pattern disposed over the variable resistance pattern and having a lower surface in direct contact with an upper surface of the variable resistance pattern, the selector pattern structured to include an insulating material doped with dopants and to exhibit a threshold switching behavior to exhibit, and selectively switch between, an (1) electrical conducting state of providing an electrical conducting path in the selector pattern, and (2) an electrical non-conducting state of turning off the electrical conducting path in the selector pattern, wherein a sidewall of the variable resistance pattern and a sidewall of the selector pattern are aligned with each other.
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公开(公告)号：US20250098554A1
公开(公告)日：2025-03-20
申请号：US18594987
申请日：2024-03-04
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
Abstract: A semiconductor device includes: a selector pattern including an insulating material having dopants implanted to the insulating material along an implantation direction and having a first sidewall and a second sidewall facing the first sidewall, the selector pattern configured to exhibit different electrical conducting characteristics in response to an applied voltage with respect to a threshold voltage; and a first electrode layer and a second electrode layer respectively formed over the first sidewall and the second sidewall of the selector pattern, wherein the implantation direction of the dopants is different from a direction of a current flowing through the selector pattern between the first electrode layer and the second electrode layer when the selector pattern is turned on.
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公开(公告)号：US20230247844A1
公开(公告)日：2023-08-03
申请号：US18132296
申请日：2023-04-07
Applicant: SK hynix Inc.
Inventor： Tae Jung HA , Jeong Hwan SONG
CPC classification number: H10B63/24 , G06F9/223 , G06F13/4027 , G06F13/1668 , G11C13/003 , H10B63/80 , H10N70/063 , G11C2213/72
Abstract: An electronic device may include a semiconductor memory structured to include a plurality of memory cells, wherein each of the plurality of memory cells may comprise: a first electrode layer; a second electrode layer; and a selection element layer disposed between the first electrode layer and the second electrode layer to electrically couple or decouple an electrical connection between the first electrode layer and the second electrode layer based on a magnitude of an applied voltage or an applied current with respect to a threshold magnitude, wherein the selection element layer has a dopant concentration profile which decreases from an interface between the selection element layer and the first electrode layer toward an interface between the selection element layer and the second electrode layer.
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公开(公告)号：US20230133638A1
公开(公告)日：2023-05-04
申请号：US17903962
申请日：2022-09-06
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
Abstract: A method for fabricating a semiconductor device may include: forming a first line over a substrate; forming a variable resistance layer on the first line; forming a first dielectric layer on the first line and the variable resistance layer; forming a second dielectric layer on the first dielectric layer; removing a portion of the interlayer dielectric layer to expose a portion of the first dielectric layer; and incorporating a dopant into an exposed portion of the first dielectric layer by performing an ion implantation process to convert the portion of the first dielectric layer into a selector layer.
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公开(公告)号：US20230131200A1
公开(公告)日：2023-04-27
申请号：US17903738
申请日：2022-09-06
Applicant: SK hynix Inc.
Inventor： Tae Jung HA
Abstract: A semiconductor device that includes: first conductive lines; second conductive lines disposed over the first lines to be spaced apart from the first lines; and a selector layer disposed between the first lines and the second lines and including a dielectric material and a dopant doped with a uniform dopant profile.
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