公开(公告)号：US10191664B2

公开(公告)日：2019-01-29

申请号：US15294255

申请日：2016-10-14

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G06F3/06 ,  G06F12/0802 ,  G06F12/08 ,  G06F12/10 ,  G06F12/0804 ,  G06F13/16

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US10180796B2

公开(公告)日：2019-01-15

申请号：US15294119

申请日：2016-10-14

Applicant: SK hynix Inc.

Inventor： Chang-Hyun Kim ,  Min-Chang Kim ,  Do-Yun Lee ,  Yong-Woo Lee ,  Jae-Jin Lee ,  Hoe-Kwon Jung

IPC: G06F3/06 ,  G06F13/16

Abstract: A memory system includes: a plurality of first memory devices directly or indirectly coupled to one another, each first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a multi-processor including a plurality of processors, each processor executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US09977606B2

公开(公告)日：2018-05-22

申请号：US15292481

申请日：2016-10-13

Applicant: SK hynix Inc.

Inventor： Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Yong-Woo Lee ,  Jae-Jin Lee ,  Hoe-Kwon Jung

IPC: G06F3/06 ,  G06F12/0831 ,  G06F13/42

CPC classification number: G06F3/0611 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/0831 ,  G06F13/4282 ,  G06F2212/621

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US09831001B2

公开(公告)日：2017-11-28

申请号：US14732281

申请日：2015-06-05

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee

IPC: G11C29/18 ,  G11C29/56

CPC classification number: G11C29/18 ,  G11C29/56004 ,  G11C29/56008

Abstract: A test system may include: a vector storage unit suitable for storing a first test vector corresponding to a first test operation; a test target suitable for performing a test operation corresponding to the test vector stored in a vector storage unit; a comparison unit suitable for comparing a first test result to an expected value to output a first test result value, wherein the first test result is transferred from the test target as a result of the first test operation based on the first test vector; and a vector control unit suitable for modifying the first test vector to generate a second test vector corresponding to a second test operation.