公开(公告)号：US11138120B2

公开(公告)日：2021-10-05

申请号：US16799566

申请日：2020-02-24

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung ,  Chan-Jong Woo

IPC: G06F12/08 ,  G06F12/0868 ,  G06F12/0893 ,  G06F13/00 ,  G06F12/0875

Abstract: A memory system includes: a first memory module including first volatile memories; a second memory module including second volatile memories, non-volatile memories and a module controller; a memory controller controlling the first and second memory modules through second and third control buses, respectively; and a switch array electrically coupling the second and third control buses, wherein the module controller controls the switch array to electrically couple the second and third control buses in a backup operation for backing up data of the first volatile memories to the non-volatile memories, wherein the first and second memory modules include one or more first memory stacks and one or more second memory stacks, respectively, wherein the first volatile memories are stacked in the first memory stacks, and wherein the second volatile memories, the non-volatile memories and the module controller are stacked in the second memory stacks.

公开(公告)号：US11709777B2

公开(公告)日：2023-07-25

申请号：US17493313

申请日：2021-10-04

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung ,  Chan-Jong Woo

IPC: G06F12/08 ,  G06F12/0868 ,  G06F12/0893 ,  G06F13/00 ,  G06F12/0875

CPC classification number: G06F12/0868 ,  G06F12/0875 ,  G06F12/0893 ,  G06F13/00 ,  G06F2212/1021 ,  G06F2212/1044 ,  G06F2212/214 ,  G06F2212/451 ,  Y02D10/00

Abstract: A memory system includes: a first memory module including first volatile memories; a second memory module including second volatile memories, non-volatile memories and a module controller; a memory controller controlling the first and second memory modules through second and third control buses, respectively; and a switch array electrically coupling the second and third control buses, wherein the module controller controls the switch array to electrically couple the second and third control buses in a backup operation for backing up data of the first volatile memories to the non-volatile memories, wherein the first and second memory modules include one or more first memory stacks and one or more second memory stacks, respectively, wherein the first volatile memories are stacked in the first memory stacks, and wherein the second volatile memories, the non-volatile memories and the module controller are stacked in the second memory stacks.

公开(公告)号：US10169242B2

公开(公告)日：2019-01-01

申请号：US15294387

申请日：2016-10-14

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G06F12/08 ,  G06F12/0875 ,  G06F13/00

Abstract: A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; and a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US10466909B2

公开(公告)日：2019-11-05

申请号：US15294320

申请日：2016-10-14

Applicant: SK hynix Inc.

Inventor： Chang-Hyun Kim ,  Min-Chang Kim ,  Do-Yun Lee ,  Yong-Woo Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G06F3/06 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access data storage memory through the first and second memory devices.

公开(公告)号：US09595309B2

公开(公告)日：2017-03-14

申请号：US14997775

申请日：2016-01-18

Applicant: SK hynix Inc.

Inventor： Chang-Hyun Kim ,  Min-Chang Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G11C8/00 ,  G11C8/08 ,  G11C8/12 ,  G11C8/10 ,  G11C11/4076

CPC classification number: G11C8/08 ,  G11C7/04 ,  G11C8/00 ,  G11C8/10 ,  G11C8/12 ,  G11C11/4076 ,  G11C29/021 ,  G11C29/028

Abstract: A semiconductor memory device includes a plurality of memory cells coupled to multiple word lines a word line deactivation voltage generation block suitable for generating word line deactivation voltages having different voltage levels corresponding to temperature ranges, and a word line driving block suitable for driving a word line to be deactivated with the word line deactivation voltages selected from the word line deactivation voltages.

Abstract translation: 半导体存储器件包括耦合到多个字线的多个存储器单元，适用于生成具有与温度范围相对应的不同电压电平的字线去激活电压的字线去激活电压产生块，以及适于驱动字线的字线驱动块 用从字线去激活电压中选择的字线去激活电压来停用。

公开(公告)号：US10592419B2

公开(公告)日：2020-03-17

申请号：US16198495

申请日：2018-11-21

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G06F12/08 ,  G06F12/0868 ,  G06F12/0875 ,  G06F12/0893 ,  G06F13/00

Abstract: A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; and a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

公开(公告)号：US10191664B2

公开(公告)日：2019-01-29

申请号：US15294255

申请日：2016-10-14

Applicant: SK hynix Inc.

Inventor： Yong-Woo Lee ,  Min-Chang Kim ,  Chang-Hyun Kim ,  Do-Yun Lee ,  Jae-Jin Lee ,  Hun-Sam Jung

IPC: G06F3/06 ,  G06F12/0802 ,  G06F12/08 ,  G06F12/10 ,  G06F12/0804 ,  G06F13/16

Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.