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公开(公告)号：US10670456B2
公开(公告)日：2020-06-02
申请号：US15692340
申请日：2017-08-31
发明人： Jeffrey M. Raynor , Laurence Stark , Filip Kaklin
IPC分类号： G01J1/42 , H01L31/042 , G01J1/46 , G01J1/44 , H01L31/02
摘要： An integrated circuit includes a substrate and at least one photo-voltaic cell implemented on the substrate. The at least one photo-voltaic cell is configured to generate a supply voltage. Circuitry is implemented on the substrate. The circuitry is powered by the supply voltage. The at least one photo-voltaic cell can include a number of series-connected photo-voltaic cells.
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公开(公告)号：US10128292B2
公开(公告)日：2018-11-13
申请号：US15637616
申请日：2017-06-29
发明人： Laurence Stark
IPC分类号： H01L21/76 , H01L21/762 , H01L27/146
摘要： A method can be used to manufacture a charge storage cell with a first trench and a second trench in a substrate material. The first trench is filled with a doped material. The second trench is filled with a second trench material. The method includes causing the dopant to diffuse from the first trench to thereby provide a doped region adjacent to the first trench. The material from the first and second trenches is removed and at least one of the trenches is filled with a capacitive deep trench isolation material to provide capacitive deep trench isolation.
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公开(公告)号：US20180195897A1
公开(公告)日：2018-07-12
申请号：US15692340
申请日：2017-08-31
发明人： Jeffrey M. Raynor , Laurence Stark , Filip Kaklin
摘要： An integrated circuit includes a substrate and at least one photo-voltaic cell implemented on the substrate. The at least one photo-voltaic cell is configured to generate a supply voltage. Circuitry is implemented on the substrate. The circuitry is powered by the supply voltage. The at least one photo-voltaic cell can include a number of series-connected photo-voltaic cells.
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公开(公告)号：US10021334B2
公开(公告)日：2018-07-10
申请号：US15250605
申请日：2016-08-29
发明人： Laurence Stark
IPC分类号： H04N3/14 , H04N5/335 , H04N5/378 , H01L27/146 , H04N5/374
CPC分类号： H04N5/378 , H01L27/14612 , H01L27/14643 , H04N5/3532 , H04N5/3575 , H04N5/363 , H04N5/374 , H04N5/37452
摘要： An embodiment circuit includes a first source follower configured to be controlled by a voltage at a first node, a photodiode controllably coupled to the first node, and a bias transistor configured to be controlled by a bias voltage. The bias transistor has a first terminal coupled to an output of the first source follower. The circuit additionally includes a storage node controllably coupled to the output of the first source follower, and an amplifier controllably coupled between the storage node and an output line. Also included in the circuit is a controllable switching element configured to couple a second terminal of the bias transistor to a supply voltage in response to a pixel operating in a first mode, and to couple the second terminal of the bias transistor to the output line in response to the pixel operating in a second mode.
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15.发明申请公开(公告)号：US20210111296A1
公开(公告)日：2021-04-15
申请号：US17129422
申请日：2020-12-21
发明人： Laurence Stark
IPC分类号： H01L31/107 , H01L31/02 , H01L31/0352 , H01L31/103 , H01L31/18 , H01L29/72
摘要： An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.
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公开(公告)号：US20180166496A1
公开(公告)日：2018-06-14
申请号：US15637616
申请日：2017-06-29
发明人： Laurence Stark
IPC分类号： H01L27/146 , H01L27/148
CPC分类号： H01L27/1463 , H01L21/76224 , H01L21/76237 , H01L21/763 , H01L27/1461 , H01L27/14612 , H01L27/14643 , H01L27/14687 , H01L27/14689
摘要： A method can be used to manufacture a charge storage cell with a first trench and a second trench in a substrate material. The first trench is filled with a doped material. The second trench is filled with a second trench material. The method includes causing the dopant to diffuse from the first trench to thereby provide a doped region adjacent to the first trench. The material from the first and second trenches is removed and at least one of the trenches is filled with a capacitive deep trench isolation material to provide capacitive deep trench isolation.
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公开(公告)号：US09966399B2
公开(公告)日：2018-05-08
申请号：US14972253
申请日：2015-12-17
发明人： Laurence Stark
IPC分类号： H01L27/146 , H04N5/374 , H04N5/3745
CPC分类号： H01L27/14614 , H01L27/1463 , H01L27/1464 , H01L27/14641 , H01L27/14643 , H01L27/14647 , H04N5/374 , H04N5/37457
摘要： A pixel is formed by two or more photodiodes and at least one transfer gate. The transfer gate is configured to transfer charge from each of the photodiodes to a common sense node, such that charge from the photodiodes is combined at the common sense node.
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公开(公告)号：US20180108799A1
公开(公告)日：2018-04-19
申请号：US15609854
申请日：2017-05-31
发明人： Laurence Stark
IPC分类号： H01L31/107 , H01L31/02 , H01L29/72
CPC分类号： H01L31/107 , G01J2001/4466 , H01L29/72 , H01L31/02027 , H01L31/0352 , H01L31/1037 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： An avalanche diode includes a PN junction with a first deep trench structure adjacent to the PN junction. An area via which photons impinge is provided, the PN junction extending substantially vertically with respect to the area. An avalanche diode array can be formed to include a number of avalanche diodes.
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公开(公告)号：US20190221704A1
公开(公告)日：2019-07-18
申请号：US16368648
申请日：2019-03-28
发明人： Laurence Stark
IPC分类号： H01L31/107 , H01L31/103 , H01L29/72 , H01L31/02 , H01L31/18 , H01L31/0352
CPC分类号： H01L31/107 , G01J2001/4466 , H01L29/72 , H01L31/02027 , H01L31/0352 , H01L31/1037 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要： An embodiment method of manufacturing an avalanche diode includes forming a first trench in a substrate material, filling the first trench with a first material that comprises a dopant, and causing the dopant to diffuse from the first trench to form part of a PN junction. An avalanche diode array can be formed to include a number of the avalanche diodes.
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公开(公告)号：US09728578B2
公开(公告)日：2017-08-08
申请号：US14454776
申请日：2014-08-08
发明人： Graeme Storm , Christophe Mandier , Laurence Stark
IPC分类号： H01L27/148 , H04N5/355 , H04N5/359 , H04N5/3745 , H01L27/146
CPC分类号： H01L27/14812 , H01L27/14609 , H01L27/14638 , H01L27/14643 , H04N5/355 , H04N5/3559 , H04N5/3597 , H04N5/37452
摘要： A pixel arrangement includes a photodiode, a reset transistor configured to be controlled by a reset signal and coupled to a reset input voltage, a transfer gate transistor configured to transfer charge from the photodiode to a node, wherein the transfer gate transistor is controlled by a transfer gate voltage, and a source follower transistor controlled by the voltage on the node and coupled to a source follower voltage. A capacitor is coupled between the node and an input voltage. During a read operation the input voltage is increased to boost the voltage at the node. The increased input voltage may, for example, be one the reset input voltage, said source follower voltage, said transfer gate voltage and a boosting voltage.
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