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23 条记录 (耗时 0.021 秒)

    Pixel Circuit and Method of Operating the Same
    2.
    发明申请
    Pixel Circuit and Method of Operating the Same 有权

    公开(公告)号：US20180063459A1

    公开(公告)日：2018-03-01

    申请号：US15250605

    申请日：2016-08-29

    申请人： STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED

    发明人： Laurence Stark

    IPC分类号： H04N5/378 ,  H01L27/146 ,  H04N5/374

    CPC分类号： H04N5/378 ,  H01L27/14612 ,  H01L27/14643 ,  H04N5/374

    摘要： An embodiment circuit includes a first source follower configured to be controlled by a voltage at a first node, a photodiode controllably coupled to the first node, and a bias transistor configured to be controlled by a bias voltage. The bias transistor has a first terminal coupled to an output of the first source follower. The circuit additionally includes a storage node controllably coupled to the output of the first source follower, and an amplifier controllably coupled between the storage node and an output line. Also included in the circuit is a controllable switching element configured to couple a second terminal of the bias transistor to a supply voltage in response to a pixel operating in a first mode, and to couple the second terminal of the bias transistor to the output line in response to the pixel operating in a second mode.

    Charge storage cell and method of manufacturing a charge storage cell
    5.
    发明授权
    Charge storage cell and method of manufacturing a charge storage cell 有权

    公开(公告)号：US10347680B2

    公开(公告)日：2019-07-09

    申请号：US16151123

    申请日：2018-10-03

    申请人： STMicroelectronics (Research & Development) Limited

    发明人： Laurence Stark

    IPC分类号： H01L21/762 ,  H01L21/763 ,  H01L27/146

    摘要： A charge storage cell includes a semiconductor region having charge carriers of a first conductivity type, a first deep trench isolation structure, and a charge storage region located adjacent to the first deep trench isolation structure. The charge storage region has charge carriers of a second conductivity type different to the first conductivity type and extends along substantially all of the first deep trench isolation structure. A second deep trench isolation structure is located adjacent to the charge storage region and opposite the first deep trench isolation structure.

    Single photon avalanche diode (SPAD) with variable quench resistor
    6.
    发明授权
    Single photon avalanche diode (SPAD) with variable quench resistor 有权

    公开(公告)号：US10312274B1

    公开(公告)日：2019-06-04

    申请号：US15881916

    申请日：2018-01-29

    申请人： STMicroelectronics (Research & Development) Limited

    发明人： Laurence Stark

    IPC分类号： H01L31/107 ,  H01L27/144 ,  H01L29/8605 ,  H01L31/02 ,  H01L27/146

    摘要： A photosensitive diode has an anode terminal and a cathode terminal. A passive quench resistance circuit includes a resistor with a variable resistance that is controlled by a control signal. The resistor is electrically connected to the cathode terminal. The resistor of the passive quench resistance circuit is formed by a first semiconductor region. The control signal is applied to a control gate of the passive quench resistance circuit. The control gate is formed by a second semiconductor region that is insulated from the first semiconductor region and extends parallel to the first semiconductor region. The voltage of the control signal applied to the control gate controls the variable resistance.

    PIXEL CIRCUIT
    8.
    发明申请
    PIXEL CIRCUIT 有权
    像素电路

    公开(公告)号：US20150041865A1

    公开(公告)日：2015-02-12

    申请号：US14454776

    申请日：2014-08-08

    申请人： STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Research & Development) Limited

    发明人： Graeme Storm ,  Christophe Mandier ,  Laurence Stark

    IPC分类号： H01L27/148

    CPC分类号： H01L27/14812 ,  H01L27/14609 ,  H01L27/14638 ,  H01L27/14643 ,  H04N5/355 ,  H04N5/3559 ,  H04N5/3597 ,  H04N5/37452

    摘要： A pixel arrangement includes a photodiode, a reset transistor configured to be controlled by a reset signal and coupled to a reset input voltage, a transfer gate transistor configured to transfer charge from the photodiode to a node, wherein the transfer gate transistor is controlled by a transfer gate voltage, and a source follower transistor controlled by the voltage on the node and coupled to a source follower voltage. A capacitor is coupled between the node and an input voltage. During a read operation the input voltage is increased to boost the voltage at the node. The increased input voltage may, for example, be one the reset input voltage, said source follower voltage, said transfer gate voltage and a boosting voltage.

    摘要翻译： 像素布置包括光电二极管，复位晶体管，其配置为由复位信号控制并耦合到复位输入电压;传输门晶体管，被配置为将电荷从光电二极管传输到节点，其中传输门晶体管由 传输栅极电压和源极跟随器晶体管，由节点上的电压控制并耦合到源极跟随器电压。 电容器耦合在节点和输入电压之间。 在读操作期间，增加输入电压以提高节点处的电压。 增加的输入电压可以例如是复位输入电压，所述源极跟随器电压，所述传输栅极电压和升压电压之一。