公开(公告)号：US20210407894A1

公开(公告)日：2021-12-30

申请号：US17470269

申请日：2021-09-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Fulvio Vittorio FONTANA ,  Giovanni GRAZIOSI ,  Michele DERAI

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00

Abstract: Methods of forming a semiconductor device comprising a lead-frame having a die pad having at least one electrically conductive die pad area and an insulating layer applied onto the electrically conductive die pad area. An electrically conductive layer is applied onto the insulating layer with one or more semiconductor dice coupled, for instance adhesively, to the electrically conductive layer. The electrically conductive die pad area, the electrically conductive layer and the insulating layer sandwiched therebetween form at least one capacitor integrated in the device. The electrically conductive die pad area comprises a sculptured structure with valleys and peaks therein; the electrically conductive layer comprises electrically conductive filling material extending into the valleys in the sculptured structure of the electrically conductive die pad area.

公开(公告)号：US20210050299A1

公开(公告)日：2021-02-18

申请号：US16990748

申请日：2020-08-11

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni ZIGLIOLI ,  Alberto PINTUS ,  Michele DERAI ,  Pierangelo MAGNI

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A method of manufacturing semiconductor devices, such as integrated circuits includes arranging one or more semiconductor dice on a support surface. Laser direct structuring material is molded onto the support surface having the semiconductor die/dice arranged thereon. Laser beam processing is performed on the laser direct structuring material molded onto the support surface having the semiconductor die/dice arranged thereon to provide electrically conductive formations for the semiconductor die/dice arranged on the support surface. The semiconductor die/dice provided with the electrically-conductive formations are separated from the support surface.

公开(公告)号：US20250105024A1

公开(公告)日：2025-03-27

申请号：US18973931

申请日：2024-12-09

Applicant: STMicroelectronics S.r.l.

Inventor： Fulvio Vittorio FONTANA ,  Michele DERAI

IPC: H01L21/48 ,  H01L21/78 ,  H01L23/495

Abstract: A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.

公开(公告)号：US20230143539A1

公开(公告)日：2023-05-11

申请号：US17977137

申请日：2022-10-31

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Pierangelo MAGNI

IPC: H01L23/48 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L23/29 ,  H01L23/3135 ,  H01L23/49503 ,  H01L21/565 ,  H01L21/60 ,  H01L21/76877 ,  H01L2021/60292

Abstract: A semiconductor die is arranged on a substrate and an encapsulation of laser direct structuring (LDS) material is molded onto the semiconductor die. A through mold via (TMV) extends through the encapsulation. This TMV includes a collar section that extends through a first portion of the encapsulation from an outer surface to an intermediate level of the encapsulation, and a frusto-conical section that extends from a bottom of the collar section through a second portion of the encapsulation. The collar section has a first cross-sectional area at the intermediate level. The first end of the frusto-conical section has a second cross-section area at the intermediate level. The second cross-sectional area is smaller than the first cross-sectional area. The TMV can have an aspect ratio which is not limited to 1:1.

公开(公告)号：US20230035445A1

公开(公告)日：2023-02-02

申请号：US17872893

申请日：2022-07-25

Applicant: STMicroelectronics S.r.l.

Inventor： Dario VITELLO ,  Michele DERAI

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: An encapsulation of laser direct structuring (LDS) material is molded onto first and second semiconductor dice. A die-to-die coupling formation between the first and second semiconductor dice includes die vias extending through the LDS material to reach the first and second semiconductor dice and a die-to-die line extending at a surface of the encapsulation between the die vias. After laser activating and structuring selected locations of the surface of the encapsulation for the die vias and die-to-die line, the locations are placed into contact with an electrode that provides an electrically conductive path. Metal material is electrolytically grown onto the locations of the encapsulation by exposure to an electrolyte carrying metal cations. The metal cations are reduced to metal material via a current flowing through the electrically conductive path provided via the electrode. The electrode is then disengaged from contact with the locations having metal material electrolytically grown thereon.

公开(公告)号：US20220199424A1

公开(公告)日：2022-06-23

申请号：US17550747

申请日：2021-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Fulvio Vittorio FONTANA ,  Michele DERAI

IPC: H01L21/48 ,  H01L23/495 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.

公开(公告)号：US20210013134A1

公开(公告)日：2021-01-14

申请号：US17015619

申请日：2020-09-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Michele DERAI ,  Federico Giovanni ZIGLIOLI

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A method of manufacturing semiconductor devices such as integrated circuits comprises: providing one or more semiconductor chips having first and second opposed surfaces, coupling the semiconductor chip or chips with a support substrate with the second surface towards the support substrate, embedding the semiconductor chip or chips coupled with the support substrate in electrically-insulating packaging material by providing in the packaging material electrically-conductive passageways. The electrically-conductive passageways comprise: electrically-conductive chip passageways towards the first surface of the at least one semiconductor chip, and/or electrically-conductive substrate passageways towards the support substrate.

公开(公告)号：US20240186198A1

公开(公告)日：2024-06-06

申请号：US18437899

申请日：2024-02-09

Applicant: STMicroelectronics S.r.l.

Inventor： Pierangelo MAGNI ,  Michele DERAI

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/18 ,  H01L23/498

CPC classification number: H01L23/3107 ,  H01L21/561 ,  H01L23/18 ,  H01L23/49838

Abstract: A semiconductor chip or die is mounted at a position on a support substrate. A light-permeable laser direct structuring (LDS) material is then molded onto the semiconductor chip positioned on the support substrate. The semiconductor chip is visible through the LDS material. Laser beam energy is directed to selected spatial locations of the LDS material to structure in the LDS material a pattern of structured formations corresponding to the locations of conductive lines and vias for making electrical connection to the semiconductor chip. The spatial locations of the LDS material to which laser beam energy is directed are selected as a function of the position the semiconductor chip which is visible through the LDS material, thus countering undesired effects of positioning offset of the chip on the substrate.

公开(公告)号：US20240038650A1

公开(公告)日：2024-02-01

申请号：US18223838

申请日：2023-07-19

Applicant: STMicroelectronics S.r.l.

Inventor： Damian HALICKI ,  Michele DERAI

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L23/3107 ,  H01L28/10 ,  H01L25/0655 ,  H01L21/561 ,  H01L23/49822

Abstract: Semiconductor devices of the type currently referred to as a System in a Package (SiP) and having embedded therein a transformer are produced by embedding at least one semiconductor chip in an insulating encapsulation at a first portion thereof. Over a second portion thereof at least partly non-overlapping with the first portion, a stacked structure is formed including multiple layers of electrically insulating material as well as respective patterns of electrically conductive material. The respective patterns of electrically conductive material have: a planar coil geometry for providing electrically conductive coils such as the windings of a transformer and a geometrical distribution providing electrically conductive connections to one or more semiconductor chips.

公开(公告)号：US20220068741A1

公开(公告)日：2022-03-03

申请号：US17411585

申请日：2021-08-25

Applicant: STMicroelectronics S.r.l.

Inventor： Pierangelo MAGNI ,  Michele DERAI

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/18 ,  H01L21/56

Abstract: A semiconductor chip or die is mounted at a position on a support substrate. A light-permeable laser direct structuring (LDS) material is then molded onto the semiconductor chip positioned on the support substrate. The semiconductor chip is visible through the LDS material. Laser beam energy is directed to selected spatial locations of the LDS material to structure in the LDS material a pat gstern of structured formations corresponding to the locations of conductive lines and vias for making electrical connection to the semiconductor chip. The spatial locations of the LDS material to which laser beam energy is directed are selected as a function of the position the semiconductor chip which is visible through the LDS material, thus countering undesired effects of positioning offset of the chip on the substrate.