Abstract:
A display device includes: a display panel comprising a display area configured to display an image, wherein the display area includes a measurement area including a plurality of sub-measurement areas, and each of the plurality of sub-measurement areas includes a plurality of pre-map areas; a data driver configured to provide data voltages to the display panel; a signal controller; and a common voltage generator configured to provide a common voltage to the display panel, wherein an afterimage reduction mode is driven to change a level of the common voltage provided by the common voltage generator when the determined pre-map areas are adjacent to each other.
Abstract:
A display apparatus includes a timing controller, a common voltage generator, a data driver, and a display panel. The timing controller determines a representative grayscale of each frame based on input image data and generates a common voltage control signal having a first digital value ratio (“DVR”) value corresponding to a first frame, a representative grayscale of the first frame being included in a first grayscale range. The common voltage generator generates a first common voltage based on the common voltage control signal. The data driver generates a data voltage based on the input image data. The display panel displays an image corresponding to the first frame based on the data voltage and the first common voltage.
Abstract:
A display apparatus includes a plurality of primary color pixels and a plurality of white pixels. The white pixels include a first white pixel to receive a first white pixel signal generated based on a first gamma curve and a second white pixel to receive a second white pixel signal generated based on a second gamma curve.
Abstract:
A display apparatus includes a plurality of pixels connected to a plurality of gate lines and a plurality of data lines and a timing controller, in which each pixel includes a first sub-pixel and a second sub-pixel. In such a display apparatus, the timing controller provides the first sub-pixel and the second sub-pixel with a first data signal and a second data signal corresponding to one of a high gray scale curve and a low gray scale curve, alternately every frame, when the image signal is a first type of image signal, and the timing controller provides the first sub-pixel with a first data signal corresponding to the high gray scale curve and the second sub-pixel with a second data signal corresponding to the low gray scale curve when the image signal is a first type of image signal.
Abstract:
A display apparatus includes a housing having a pillar shape, a plurality of monitors, and a driving unit received in the housing and providing driving signals to the plurality of monitors. Each of the plurality of monitors displays an image through its front surface and back surface and includes side surfaces connecting the front surface and the back surface. One side surface of the side surfaces of each of the plurality of monitors is coupled to the housing. A thickness of each of the plurality of monitors decreases as a distance from the housing increases.
Abstract:
A display device includes a signal controller. A data driver is connected to the signal controller. A memory unit is connected to the signal controller. The memory unit stores data driver characteristic information corresponding to a manufacturer identification (ID) of each of a plurality of data drivers. The data driver transmits a manufacturer ID to the signal controller. The signal controller reads, from the memory unit, data driver characteristic information corresponding to the manufacturer ID received from the data driver, and the signal controller generates image data and a control signal based on the read data driver characteristic information.
Abstract:
A display apparatus includes pixels each including first and second sub-pixels having different transmittances from each other under a same gray scale, gate lines commonly connected to the first and second sub-pixels to apply a gate signal to the first and second sub-pixels, a first data line applying a first data signal to one of the first and second sub-pixels, and a second data line applying a second data signal to the other one of the first and second sub-pixels. The first sub-pixel has the transmittance lower than the transmittance of the second sub-pixel, and the second sub-pixel connected to an i-th gate line of the gate lines is disposed between the first sub-pixel connected to the i-th gate line and the first sub-pixel connected to an (i+1)th gate line of the gate lines.
Abstract:
A liquid crystal display includes a display panel, a timing controller, a gate driver, and a data driver. The display panel includes a plurality of pixels. The timing controller receives an image data, compares a previous line data with a present line data to determine whether the present line data needs to be compensated, and generates a first modulation line data. In addition, the timing controller calculates the first modulation data and a delay compensation value to generate a second modulation line data. The delay compensation value is decided from reference delay compensation values of reference pixels among the pixels.
Abstract:
A stereoscopic image display system includes a three-dimensional (3D) image signal generator, a display panel, a timing controller, a data driver, and a gate driver. The 3D image signal generator generates left-eye data and right-eye data on the basis of an image signal outputs the left-eye data and the right-eye data to the timing controller. The timing controller outputs the left-eye data and the right-eye data having a first frequency to the data driver in a first mode and outputs left-eye frame data and right-eye frame data having a second frequency to the data driver in a second mode. Two pixels, which are respectively connected to an i-th gate line and an (i+1)th gate line among the gate lines and to a same data line among the data lines, are operated with the same driving time in the first and second modes.
Abstract:
A stereoscopic image display system includes a three-dimensional (3D) image signal generator, a display panel, a timing controller, a data driver, and a gate driver. The 3D image signal generator generates left-eye data and right-eye data on the basis of an image signal outputs the left-eye data and the right-eye data to the timing controller. The timing controller outputs the left-eye data and the right-eye data having a first frequency to the data driver in a first mode and outputs left-eye frame data and right-eye frame data having a second frequency to the data driver in a second mode. Two pixels, which are respectively connected to an i-th gate line and an (i+1)th gate line among the gate lines and to a same data line among the data lines, are operated with the same driving time in the first and second modes.