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公开(公告)号:US20200273870A1
公开(公告)日:2020-08-27
申请号:US15931869
申请日:2020-05-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Young-Hwan Son , Jae-Hoon Jang , Jee-Hoon Han
IPC: H01L27/11556 , H01L27/11519 , H01L27/11565 , H01L27/11524 , H01L27/1157 , H01L27/11529 , H01L27/11573 , H01L27/11582
Abstract: A vertical non-volatile memory device includes a lower insulating layer on a substrate, a multilayer structure including gate electrodes and interlayer insulating layers alternately stacked on the lower insulating layer, a gate dielectric layer and a channel structure, and has an opening extending through the multilayer structure and exposing the lower insulating layer. The opening includes a first open portion extending through at least one layer of the multilayer structure at a first width, and a second open portion extending through the multilayer structure at a second width less than the first width. The gate dielectric layer lines the opening, and the channel structure is disposed on the gate dielectric layer and is electrically connected to the substrate.
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12.
公开(公告)号:US10650903B2
公开(公告)日:2020-05-12
申请号:US16206383
申请日:2018-11-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
IPC: G11C16/04 , G11C16/10 , G11C16/34 , H01L27/11582 , G11C16/08 , G11C16/12 , G11C16/14 , G11C16/26 , H01L27/1157
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
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公开(公告)号:US09966115B2
公开(公告)日:2018-05-08
申请号:US15586002
申请日:2017-05-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung-Min Hwang , Han-Soo Kim , Won-Seok Cho , Jae-Hoon Jang , Sun-Il Shim , Jae-Hun Jeong , Ki-Hyun Kim
IPC: H01L27/115 , G11C5/06 , H01L23/528
CPC classification number: G11C5/06 , H01L23/5283 , H01L27/112 , H01L27/115 , H01L27/11517
Abstract: A vertical non-volatile memory device includes a substrate, and a first stack of word lines and a second stack of word lines extending in a first direction on the substrate and separated from each other in a second direction perpendicular to the first direction. The device further includes first array lines extending in the second direction on the first and the second stack, and connected to word lines of the first and the second stack through at least two of first via contacts in a same level. The device further include first word select lines being in a same level and extending in the first direction, and connected to each of the first array lines through at least one of second via contacts. Ends of each of the first and the second stack have a form of stairs on the substrate.
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公开(公告)号:US11411024B2
公开(公告)日:2022-08-09
申请号:US16995084
申请日:2020-08-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sung-Yun Lee , Jae-Hoon Jang , Jae-Duk Lee , Joon-Hee Lee , Young-Jin Jung
IPC: H01L27/11556 , H01L27/11582 , H01L21/768 , H01L21/308 , H01L21/28 , H01L27/11565
Abstract: A vertical type semiconductor device includes insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, a channel structure on the substrate and penetrating through the insulation patterns, a first conductive pattern partially filling a gap between the insulation patterns adjacent to each other in the first direction and the channel structure and having a slit in a surface thereof, the slit extending in a direction parallel with the top surface of the substrate, and a second conductive pattern on the first conductive pattern in the gap and filling the slit.
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公开(公告)号:US11177274B2
公开(公告)日:2021-11-16
申请号:US16177566
申请日:2018-11-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sung-Min Hwang , Han-Soo Kim , Won-Seok Cho , Jae-Hoon Jang
IPC: H01L27/11582 , H01L27/11578 , H01L21/265 , H01L21/285 , H01L21/306 , H01L21/768 , H01L29/66 , G11C16/04
Abstract: Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.
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16.
公开(公告)号:US20210295895A1
公开(公告)日:2021-09-23
申请号:US17342048
申请日:2021-06-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
IPC: G11C11/408 , G11C11/4096 , G11C11/4074 , G11C5/06
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
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