-
公开(公告)号：US11182001B2
公开(公告)日：2021-11-23
申请号：US16589604
申请日：2019-10-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Haewoon Park , Seung-hoon Baek , Jaehun Jeong , Hyeokchul Kwon
Abstract: A touch display driving integrated circuit (IC) includes a touch driver IC and a source driver IC. The touch driver IC is to be connected to touch electrodes through touch sensing lines. The touch driver IC provides a sensing signal to first touch sensing lines among the touch sensing lines in a touch period, and applies a common voltage to the first touch sensing lines before the touch period is terminated. The source driver IC is to be connected to pixels through data lines.
-
2.发明申请公开(公告)号：US20200033989A1
公开(公告)日：2020-01-30
申请号：US16589604
申请日：2019-10-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Haewoon PARK , Seung-hoon Baek , Jaehun Jeong , Hyeokchul Kwon
Abstract: A touch display driving integrated circuit (IC) includes a touch driver IC and a source driver IC. The touch driver IC is to be connected to touch electrodes through touch sensing lines. The touch driver IC provides a sensing signal to first touch sensing lines among the touch sensing lines in a touch period, and applies a common voltage to the first touch sensing lines before the touch period is terminated. The source driver IC is to be connected to pixels through data lines.
-
公开(公告)号：USRE46623E1
公开(公告)日：2017-12-05
申请号：US14737811
申请日：2015-06-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Sunghoi Hur , Kihyun Kim , Hansoo Kim , Jaehun Jeong
CPC classification number: G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3427
Abstract: In a method of multiple-bit programming of a three-dimensional memory device having arrays of memory cells that extend in horizontal and vertical directions relative to a substrate, the method comprises first programming a memory cell to be programmed to one among a first set of states. At least one neighboring memory cell that neighbors the memory cell to be programmed to one among the first set of states is then first programmed. Following the first programming of the at least one neighboring memory cell, second programming the memory cell to be programmed to one among a second set of states, wherein the second set of states has a number of states that is greater than the number of states in the first set of states.
-
4.发明授权Non-volatile memory devices, operating methods thereof and memory systems including the same 有权非易失性存储器件，其操作方法和包括其的存储器系统公开(公告)号：US08964476B2
公开(公告)日：2015-02-24
申请号：US13867716
申请日：2013-04-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
CPC classification number: G11C16/3459 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/12 , G11C16/14 , G11C16/26 , G11C16/3418 , H01L27/1157 , H01L27/11582
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
Abstract translation: 非易失性存储器件，其操作方法和包括该非易失性存储器件的存储器系统。 非易失性存储器件可以包括存储单元阵列和字线驱动器。 存储单元阵列可以包括多个存储单元。 字线驱动器可以被配置为分别将字线电压施加到连接到多个存储器单元的多个字线。 字线电压的大小可以根据多个字线的位置来确定。
-
5.发明授权公开(公告)号：US08767473B2
公开(公告)日：2014-07-01
申请号：US13962451
申请日：2013-08-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Sunghoi Hur , Kihyun Kim , Hansoo Kim , Jaehun Jeong
IPC: G11C16/00
CPC classification number: G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3427
Abstract: In a method of multiple-bit programming of a three-dimensional memory device having arrays of memory cells that extend in horizontal and vertical directions relative to a substrate, the method comprises first programming a memory cell to be programmed to one among a first set of states. At least one neighboring memory cell that neighbors the memory cell to be programmed to one among the first set of states is then first programmed. Following the first programming of the at least one neighboring memory cell, second programming the memory cell to be programmed to one among a second set of states, wherein the second set of states has a number of states that is greater than the number of states in the first set of states.
Abstract translation: 在具有相对于衬底在水平和垂直方向上延伸的存储器单元阵列的三维存储器件的多位编程的方法中，该方法包括首先将要编程的存储器单元编程为第一组 状态。 然后，首先对与第一组状态中的一个相邻的要存储单元相邻的至少一个相邻存储单元进行编程。 在对所述至少一个相邻存储器单元进行第一编程之后，将要编程的存储器单元的第二编程为第二组状态之一，其中所述第二组状态具有大于所述状态数 第一套状态。
-
Patent Agency Ranking
6.发明授权Vertically-integrated nonvolatile memory devices having laterally-integrated ground select transistors 有权具有横向集成的地选择晶体管的垂直集成的非易失性存储器件公开(公告)号：US09202571B2
公开(公告)日：2015-12-01
申请号：US14272765
申请日：2014-05-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehun Jeong , Jaehoon Jang , Kihyun Kim
IPC: G11C11/34 , G11C16/04 , H01L27/115
CPC classification number: H01L27/11582 , G11C16/0408 , G11C16/0466 , G11C16/0483 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/1157
Abstract: Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.
Abstract translation: 非易失性存储器件利用垂直堆叠的非易失性存储器单元串（例如，NAND型串），其可选择性地耦合到衬底内的公共源极线。 该选择耦合可以由具有不同阈值电压的横向接地选择晶体管提供，这些阈值电压考虑了非垂直堆叠的非易失性存储单元串与公共源极线之间的不同横向间隔。
-
7.发明申请NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF OPERATING THE SAME 有权具有垂直结构的非易失性存储器件及其操作方法公开(公告)号：US20130201758A1
公开(公告)日：2013-08-08
申请号：US13836212
申请日：2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Doogon Kim , Sunil Shim , Hansoo Kim , Wonseok Cho , Jaehoon Jang , Jaehun Jeong
IPC: G11C16/10
CPC classification number: G11C16/10 , G11C16/0483 , H01L27/11524 , H01L27/11551 , H01L27/11556 , H01L29/66825 , H01L29/7881
Abstract: Provided is a method of operating a non-volatile memory device. The method includes applying a turn-on voltage to each of first and second string select transistors of a first NAND string, applying first and second voltages to third and fourth string select transistors of a second NAND string, respectively, and applying a high voltage to word lines connected with memory cells of the first and second NAND strings.
Abstract translation: 提供了一种操作非易失性存储器件的方法。 该方法包括对第一NAND串的第一和第二串选择晶体管中的每一个施加导通电压，将第一和第二电压分别施加到第二NAND串的第三和第四串选择晶体管，并将高电压施加到 与第一和第二NAND串的存储单元相连的字线。
-
8.发明授权公开(公告)号：US11062784B2
公开(公告)日：2021-07-13
申请号：US16844317
申请日：2020-04-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-Il Shim , Jae-Hoon Jang , Donghyuk Chae , Youngho Lim , Hansoo Kim , Jaehun Jeong
IPC: G11C16/10 , G11C16/34 , G11C16/04 , H01L27/11582 , G11C16/08 , G11C16/12 , G11C16/14 , G11C16/26 , H01L27/1157
Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.
-
公开(公告)号：US09331095B2
公开(公告)日：2016-05-03
申请号：US14921845
申请日：2015-10-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehun Jeong , Jaehoon Jang , Kihyun Kim
IPC: G11C11/34 , H01L27/115 , G11C16/04
CPC classification number: H01L27/11582 , G11C16/0408 , G11C16/0466 , G11C16/0483 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/1157
Abstract: Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.
-
10.发明申请VERTICALLY-INTEGRATED NONVOLATILE MEMORY DEVICES HAVING LATERALLY-INTEGRATED GROUND SELECT TRANSISTORS 审中-公开具有横向集成式接地选择晶体管的垂直集成非易失性存储器件公开(公告)号：US20160056172A1
公开(公告)日：2016-02-25
申请号：US14921845
申请日：2015-10-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehun Jeong , Jaehoon Jang , Kihyun Kim
IPC: H01L27/115
CPC classification number: H01L27/11582 , G11C16/0408 , G11C16/0466 , G11C16/0483 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/1157
Abstract: Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.
Abstract translation: 非易失性存储器件利用垂直堆叠的非易失性存储器单元串（例如，NAND型串），其可选择性地耦合到衬底内的公共源极线。 该选择耦合可以由具有不同阈值电压的横向接地选择晶体管提供，这些阈值电压考虑了非垂直堆叠的非易失性存储单元串与公共源极线之间的不同横向间隔。
-
-
-
-
-
-
-
-
-
Search Results
21
records
(took 0.02 seconds)
