公开(公告)号：US09978835B2

公开(公告)日：2018-05-22

申请号：US15339690

申请日：2016-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gil Yang ,  Sang-Su Kim ,  Sung-Gi Hur

IPC: H01L29/06 ,  H01L29/267 ,  H01L29/786 ,  H01L29/423 ,  H01L29/20 ,  H01L21/02 ,  H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L21/8234 ,  H01L27/092

CPC classification number: H01L29/0673 ,  H01L21/02233 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0642 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/20 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

Abstract: A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.

公开(公告)号：US11222949B2

公开(公告)日：2022-01-11

申请号：US16996334

申请日：2020-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L27/148 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US10923476B2

公开(公告)日：2021-02-16

申请号：US16534070

申请日：2019-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US10784344B2

公开(公告)日：2020-09-22

申请号：US16052091

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L27/148 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US09324812B2

公开(公告)日：2016-04-26

申请号：US14489418

申请日：2014-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gil Yang ,  Sang-Su Kim ,  Sung-Gi Hur

IPC: H01L29/06 ,  H01L29/267 ,  H01L29/20 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/092

CPC classification number: H01L29/0673 ,  H01L21/02233 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0642 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/20 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

Abstract: A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.

Abstract translation: 半导体器件包括至少一个纳米线，其被布置在衬底上，延伸成与衬底间隔开，并且包括通道区域，围绕沟道区域的至少一部分的栅极和栅极电介质膜，栅极电介质膜是 设置在通道区域和栅极之间。 接触至少一个纳米线的一端的源/漏区形成在从衬底延伸到至少一个纳米线的一端的半导体层中。 在衬底和至少一个纳米线之间形成绝缘间隔物。 绝缘垫片设置在栅极和源极/漏极区域之间，并且由与栅极电介质膜的材料不同的材料形成。