公开(公告)号：US12199099B2

公开(公告)日：2025-01-14

申请号：US18130010

申请日：2023-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/165 ,  H01L29/20 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US09129815B2

公开(公告)日：2015-09-08

申请号：US14155192

申请日：2014-01-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gil Yang ,  Sang-Su Kim ,  Chang-Jae Yang

IPC: H01L21/02 ,  H01L29/04 ,  H01L29/78

CPC classification number: H01L29/04 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7848

Abstract: Provided is a semiconductor device comprising a substrate including a first area and a second area, first through third crystalline layers sequentially stacked on the first area and having first through third lattice constants, respectively, a first gate electrode formed on the third crystalline layer, fourth and fifth crystalline layers sequentially stacked on the second area and having fourth and fifth lattice constants, respectively, and a second gate electrode formed on the fifth crystalline layer, wherein the third lattice constant is greater than the second lattice constant, the second lattice constant is greater than the first lattice constant, and the fifth lattice constant is smaller than the fourth lattice constant.

Abstract translation: 本发明提供一种半导体器件，包括：包括第一区域和第二区域的衬底，分别依次层叠在第一区域上并具有第一至第三晶格常数的第一至第三晶体层，形成在第三晶体层上的第一栅电极，第四晶体管 和分别依次层叠在第二区域上并具有第四和第五晶格常数的第五晶体层和形成在第五晶体层上的第二栅电极，其中第三晶格常数大于第二晶格常数，第二晶格常数为 大于第一晶格常数，第五晶格常数小于第四晶格常数。

公开(公告)号：US11894379B2

公开(公告)日：2024-02-06

申请号：US17844435

申请日：2022-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

CPC classification number: H01L27/0924 ,  H01L21/82385 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/413 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/775 ,  H01L29/78696 ,  H01L21/823412 ,  H01L21/823807 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42392 ,  H01L29/7853 ,  H01L2924/13086

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US10431585B2

公开(公告)日：2019-10-01

申请号：US15830981

申请日：2017-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US11309421B2

公开(公告)日：2022-04-19

申请号：US16816971

申请日：2020-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Beom-Jin Park ,  Seung-Min Song ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/786 ,  H01L29/423 ,  H01L29/775

Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.

公开(公告)号：US20190157444A1

公开(公告)日：2019-05-23

申请号：US16115114

申请日：2018-08-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Beom-Jin Park ,  Seung-Min Song ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/308

Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.

公开(公告)号：US09515147B2

公开(公告)日：2016-12-06

申请号：US15075888

申请日：2016-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gil Yang ,  Sang-Su Kim ,  Sung-Gi Hur

IPC: H01L21/00 ,  H01L29/267 ,  H01L29/06 ,  H01L29/20 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/092

CPC classification number: H01L29/0673 ,  H01L21/02233 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0642 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/20 ,  H01L29/267 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78684 ,  H01L29/78696

Abstract: A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.

公开(公告)号：US11923456B2

公开(公告)日：2024-03-05

申请号：US17659571

申请日：2022-04-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Beom-Jin Park ,  Seung-Min Song ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/785 ,  H01L21/3086 ,  H01L21/762 ,  H01L21/823431 ,  H01L29/0649 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6681 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.

公开(公告)号：US11735629B2

公开(公告)日：2023-08-22

申请号：US17541625

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L21/336 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

CPC classification number: H01L29/0673 ,  B82Y10/00 ,  H01L21/0262 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/3081 ,  H01L21/30604 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/31053 ,  H01L21/823412 ,  H01L21/823425 ,  H01L27/088 ,  H01L29/165 ,  H01L29/1608

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US11367723B2

公开(公告)日：2022-06-21

申请号：US17037807

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/775 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.