公开(公告)号：US12199099B2

公开(公告)日：2025-01-14

申请号：US18130010

申请日：2023-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/165 ,  H01L29/20 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US11894379B2

公开(公告)日：2024-02-06

申请号：US17844435

申请日：2022-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

CPC classification number: H01L27/0924 ,  H01L21/82385 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/413 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/775 ,  H01L29/78696 ,  H01L21/823412 ,  H01L21/823807 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42392 ,  H01L29/7853 ,  H01L2924/13086

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US10431585B2

公开(公告)日：2019-10-01

申请号：US15830981

申请日：2017-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US11735629B2

公开(公告)日：2023-08-22

申请号：US17541625

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L21/336 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

CPC classification number: H01L29/0673 ,  B82Y10/00 ,  H01L21/0262 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/3081 ,  H01L21/30604 ,  H01L27/0886 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/401 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/31053 ,  H01L21/823412 ,  H01L21/823425 ,  H01L27/088 ,  H01L29/165 ,  H01L29/1608

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US11367723B2

公开(公告)日：2022-06-21

申请号：US17037807

申请日：2020-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/775 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US11222949B2

公开(公告)日：2022-01-11

申请号：US16996334

申请日：2020-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L27/148 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US10923476B2

公开(公告)日：2021-02-16

申请号：US16534070

申请日：2019-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US10784344B2

公开(公告)日：2020-09-22

申请号：US16052091

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L27/148 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.