公开(公告)号：US12199099B2

公开(公告)日：2025-01-14

申请号：US18130010

申请日：2023-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786 ,  H01L29/165 ,  H01L29/20 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：USRE49525E1

公开(公告)日：2023-05-09

申请号：US16986448

申请日：2020-08-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Il Bae ,  Bomsoo Kim ,  Yong-Min Cho

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L29/78 ,  H01L29/45 ,  H01L21/308 ,  H01L29/775 ,  B82Y10/00 ,  H01L27/11 ,  H01L29/165

CPC classification number: H01L29/6656 ,  B82Y10/00 ,  H01L21/308 ,  H01L29/0673 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/45 ,  H01L29/66439 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7848 ,  H01L29/78696 ,  H01L27/1104 ,  H01L29/165

Abstract: An semiconductor device is provided. A fin is disposed on a substrate, extending in a lengthwise direction. A first recess is disposed on a sidewall of the fin so that the fin and the first recess is arranged in a straight line along the lengthwise direction. A gate structure crosses the fin in the first direction crossing the lengthwise direction. A spacer is disposed on sidewalk of the gate structure. A source/drain region is disposed in the first recess. The source/drain region is formed under the spacer. A silicide layer is disposed on the source/drain region. The silicide layer and the source/drain region fill the first recess.

公开(公告)号：US20200220006A1

公开(公告)日：2020-07-09

申请号：US16816971

申请日：2020-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNG-GIL YANG ,  Beom-Jin Park ,  Seung-Min Song ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/775 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/762 ,  H01L21/308 ,  H01L29/06

Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.

公开(公告)号：US09905559B2

公开(公告)日：2018-02-27

申请号：US15612416

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Kang-Ill Seo

IPC: H01L27/088 ,  H01L21/31 ,  H01L29/06 ,  H01L29/78 ,  H01L29/161 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/3105 ,  H01L29/786 ,  H01L29/775 ,  H01L29/08 ,  H01L29/423

CPC classification number: H01L27/0886 ,  H01L21/31053 ,  H01L21/823431 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6681 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/78696

Abstract: A semiconductor device includes a first fin structure disposed on a substrate. The first fin structure extends in a first direction. A first sacrificial layer pattern is disposed on the first fin structure. The first sacrificial layer pattern includes a left portion and a right portion arranged in the first direction. A dielectric layer pattern is disposed on the first fin structure and interposed between the left and right portions of the first sacrificial layer pattern. A first active layer pattern extending in the first direction is disposed on the first sacrificial layer pattern and the dielectric layer pattern. A first gate electrode structure is disposed on a portion of the first active layer pattern. The portion of the first active layer is disposed on the dielectric layer pattern. The first gate electrode structure extends in a second direction crossing the first direction.

公开(公告)号：US09773869B2

公开(公告)日：2017-09-26

申请号：US14206373

申请日：2014-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Min Cho ,  Hyun-Jae Kang ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L29/165

CPC classification number: H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided. A substrate includes a fin. The fin extends in a first direction. A gate structure is disposed on a first region of the fin. The gate structure extends in a second direction crossing the first direction. A source/drain is disposed on a second region of the fin. The first source/drain is disposed on at least one sidewall of the gate structure. A top surface of the first region is lower than a top surface of the second region.

公开(公告)号：US12119351B2

公开(公告)日：2024-10-15

申请号：US17508704

申请日：2021-10-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Kang-Ill Seo

IPC: H01L27/092 ,  H01L21/3105 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L27/0924 ,  H01L21/31053 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6681 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/78696

Abstract: A method of manufacturing a semiconductor device includes forming a fin structure on a substrate. A sacrificial layer pattern is formed on the fin structure. An active layer pattern is formed on the sacrificial layer pattern. A dummy gate pattern is formed on the active layer pattern. A spacer is formed on the dummy gate pattern. A source/drain structure is formed on the active layer pattern using an epitaxial growth process. An interlayer dielectric layer is formed on the dummy gate pattern and the active layer pattern. The interlayer dielectric layer is planarized to expose the dummy gate pattern. The dummy gate pattern is removed to expose the active layer pattern and the sacrificial layer pattern. The exposed sacrificial layer pattern is removed to form a through-hole between the exposed active layer pattern and the fin structure, the second portion of the sacrificial layer pattern is not removed.

公开(公告)号：US11309421B2

公开(公告)日：2022-04-19

申请号：US16816971

申请日：2020-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Beom-Jin Park ,  Seung-Min Song ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/786 ,  H01L29/423 ,  H01L29/775

Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.

公开(公告)号：US20200381514A1

公开(公告)日：2020-12-03

申请号：US16996334

申请日：2020-08-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min SONG ,  Woo-Seok PARK ,  Jung-Gil YANG ,  Geum-Jong BAE ,  Dong-Il Bae

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US20190157444A1

公开(公告)日：2019-05-23

申请号：US16115114

申请日：2018-08-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Beom-Jin Park ,  Seung-Min Song ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/308

Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction.

公开(公告)号：US09525036B2

公开(公告)日：2016-12-20

申请号：US14662697

申请日：2015-03-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Bomsoo Kim ,  Yong-Min Cho

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/45 ,  H01L29/08 ,  H01L21/308

CPC classification number: H01L29/41791 ,  H01L21/308 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: An semiconductor device is provided. A fin is disposed on a substrate, extending in a lengthwise direction. A first recess is disposed on a sidewall of the fin so that the fin and the first recess is arranged in a straight line along the lengthwise direction. A gate structure crosses the fin in the first direction crossing the lengthwise direction. A spacer is disposed on sidewalk of the gate structure. A source/drain region is disposed in the first recess. The source/drain region is formed under the spacer. A silicide layer is disposed on the source/drain region. The silicide layer and the source/drain region fill the first recess.

Abstract translation: 提供半导体器件。 翅片设置在基板上，沿长度方向延伸。 第一凹部设置在翅片的侧壁上，使得翅片和第一凹部沿着长度方向布置成直线。 栅极结构在与长度方向交叉的第一方向上跨越翅片。 间隔件设置在门结构的人行道上。 源极/漏极区域设置在第一凹部中。 源极/漏极区形成在间隔物下方。 硅化物层设置在源极/漏极区域上。 硅化物层和源/漏区填充第一凹槽。