公开(公告)号：US08050073B2

公开(公告)日：2011-11-01

申请号：US12577816

申请日：2009-10-13

申请人： Jung-Hwa Lee

发明人： Jung-Hwa Lee

IPC分类号： G11C5/06 ,  G11C7/00 ,  G11C8/00

CPC分类号： G11C7/18 ,  G11C7/1042 ,  G11C7/12 ,  G11C8/08

摘要： A semiconductor memory device includes a memory block having first and second word lines extending in a first direction and bit lines extending in a perpendicular second direction; a first driver region at a side of the memory block in the first direction driving the first word lines; a second driver region at another side of the memory block in the first direction driving the second word lines; a sensing region at a side of the memory block in the second direction controlling the bit lines responsive to signals from drive lines; a first conjunction region at an intersection of the first driver and sensing regions including a first driver driving the drive lines responsive to signals from control lines; and a second conjunction region at an intersection of the second driver and sensing regions, including a second driver driving the drive lines responsive to signals from the control lines.

摘要翻译： 半导体存储器件包括具有沿第一方向延伸的第一和第二字线的存储块和沿垂直第二方向延伸的位线; 驱动所述第一字线的所述第一方向的所述存储器块的一侧的第一驱动器区域; 在所述第一方向上的所述存储块的另一侧的第二驱动器区域驱动所述第二字线; 响应于来自驱动线的信号，沿所述第二方向在所述存储器块的一侧的感测区域控制所述位线; 响应于来自控制线的信号，第一驱动器和检测区域的交叉点处的第一连接区域包括驱动驱动线路的第一驱动器; 以及在第二驱动器和感测区域的交叉点处的第二连接区域，包括响应于来自控制线路的信号驱动驱动线路的第二驱动器。

公开(公告)号：US20060001710A1

公开(公告)日：2006-01-05

申请号：US11047579

申请日：2005-02-02

申请人： Jung-Hwa Lee

发明人： Jung-Hwa Lee

IPC分类号： B41J2/175

CPC分类号： B41J2/16552 ,  B41J2/16538

摘要： An ink cartridge usable with an ink-jet printer includes a case having spaces to store ink and a cleaning solution separately, an ink injecting unit to inject ink, and a cleaning solution injecting unit to inject cleaning solution, wherein the cleaning solution injecting unit is disposed on one side of the ink injecting unit based on a movement direction of a wiping unit of the ink-jet printer. The cleaning solution is injected onto the wiping unit by the cleaning solution injecting unit integrated into the ink cartridge, so that it is possible to simplify the mechanism of the ink-jet printer, to keep a surface of the wiping unit clean, and to increase an efficiency of wiping a surface of ink injecting unit. In particular, a small quantity of cleaning solution is locally injected only onto the wiping unit, so that it is possible to reduce a consumption of the cleaning solution. Further, the cleaning solution does not scatter, so that it is possible to keep a main body of the ink-jet printer clean.

摘要翻译： 可用于喷墨打印机的墨盒包括具有分开存储墨水和清洁溶液的空间的壳体，用于注入墨水的墨水注入单元和用于注入清洁溶液的清洁溶液注入单元，其中清洁溶液注入单元是 基于喷墨打印机的擦拭单元的移动方向，设置在喷墨单元的一侧。 清洁液通过集成在墨盒中的清洗液注入单元注入到擦拭单元上，从而可以简化喷墨打印机的机构，从而使擦拭单元的表面保持清洁并增加 擦拭墨水喷射单元的表面的效率。 特别地，少量的清洁溶液仅局部地注入到擦拭单元上，从而可以减少清洁溶液的消耗。 此外，清洁溶液不会分散，从而可以使喷墨打印机的主体保持清洁。

公开(公告)号：US06847536B1

公开(公告)日：2005-01-25

申请号：US10889495

申请日：2004-07-12

申请人： Jung-Hwa Lee ,  Soo-Bong Chang

发明人： Jung-Hwa Lee ,  Soo-Bong Chang

IPC分类号： H01L27/04 ,  G11C5/02 ,  G11C5/06 ,  H01L27/105 ,  H01L27/108

CPC分类号： H01L27/10897 ,  G11C5/025 ,  G11C5/063 ,  H01L27/105 ,  H01L27/10814

摘要： A semiconductor memory device includes a column decoder, a row decoder, a memory cell array block, and a sense amplifier block. The sense amplifier block is disposed adjacent to the memory cell array block. The column decoder is disposed at one side of the memory cell array block, and the row decoder is disposed at another side of the memory cell array block. First output lines of the row decoder pass over the sense amplifier block and are formed of first metal layers. Second output lines of the row decoder pass over the memory cell array block and are formed of second metal layers. Output lines of the column decoder pass over the sense amplifier block and the memory cell array block. Portions of the output lines of the column decoder passing over the sense amplifier block are formed of the second metal layers and portions of the output lines of the column decoder that pass over the memory cell array block are formed of the first metal layers.

摘要翻译： 半导体存储器件包括列解码器，行解码器，存储单元阵列块和读出放大器块。 读出放大器块被布置成与存储单元阵列块相邻。 列解码器设置在存储单元阵列块的一侧，行解码器设置在存储单元阵列块的另一侧。 行解码器的第一输出行通过读出放大器块，并由第一金属层形成。 行解码器的第二输出行通过存储单元阵列块并且由第二金属层形成。 列解码器的输出行通过读出放大器块和存储单元阵列块。 通过读出放大器块的列解码器的输出行的部分由第二金属层形成，并且通过存储单元阵列块的列解码器的输出线的部分由第一金属层形成。

公开(公告)号：US20050013152A1

公开(公告)日：2005-01-20

申请号：US10889495

申请日：2004-07-12

申请人： Jung-Hwa Lee ,  Soo-Bong Chang

发明人： Jung-Hwa Lee ,  Soo-Bong Chang

IPC分类号： H01L27/04 ,  G11C5/02 ,  G11C5/06 ,  H01L27/105 ,  H01L27/108 ,  G11C8/00

CPC分类号： H01L27/10897 ,  G11C5/025 ,  G11C5/063 ,  H01L27/105 ,  H01L27/10814

摘要： A semiconductor memory device includes a column decoder, a row decoder, a memory cell array block, and a sense amplifier block. The sense amplifier block is disposed adjacent to the memory cell array block. The column decoder is disposed at one side of the memory cell array block, and the row decoder is disposed at another side of the memory cell array block. First output lines of the row decoder pass over the sense amplifier block and are formed of first metal layers. Second output lines of the row decoder pass over the memory cell array block and are formed of second metal layers. Output lines of the column decoder pass over the sense amplifier block and the memory cell array block. Portions of the output lines of the column decoder passing over the sense amplifier block are formed of the second metal layers and portions of the output lines of the column decoder that pass over the memory cell array block are formed of the first metal layers.

摘要翻译： 半导体存储器件包括列解码器，行解码器，存储单元阵列块和读出放大器块。 读出放大器块被布置成与存储单元阵列块相邻。 列解码器设置在存储单元阵列块的一侧，行解码器设置在存储单元阵列块的另一侧。 行解码器的第一输出行通过读出放大器块，并由第一金属层形成。 行解码器的第二输出行通过存储单元阵列块并且由第二金属层形成。 列解码器的输出行通过读出放大器块和存储单元阵列块。 通过读出放大器块的列解码器的输出行的部分由第二金属层形成，并且通过存储单元阵列块的列解码器的输出线的部分由第一金属层形成。

公开(公告)号：US08430598B2

公开(公告)日：2013-04-30

申请号：US12756739

申请日：2010-04-08

申请人： Jae-Gon Kim ,  Jung-Hwa Lee ,  Young-Woo Choi ,  Yong-Chan Cho

发明人： Jae-Gon Kim ,  Jung-Hwa Lee ,  Young-Woo Choi ,  Yong-Chan Cho

IPC分类号： A62D3/38 ,  B09C1/08 ,  C01C3/08 ,  C01C3/12

CPC分类号： B09C1/02 ,  B09C1/08

摘要： Provided is a method of remediating cyanide-contaminated soil. The method is provided to remediate soil contaminated with cyanide and treat the cyanide, which includes collecting the soil contaminated with first cyanide in a solid state and second cyanide in a gaseous or dissolved state, dissociating cyanide by mixing the soil with an alkali washing solution, dissolving the first cyanide in a solid state in the washing solution, and transferring the second cyanide in a dissolved state dissociated from the soil to the washing solution, dissociating the soil from the washing solution, precipitating the first cyanide in a solid state by acidifying the washing solution containing the cyanide, and performing post-treatment on the first cyanide after the first cyanide precipitated in a solid state is dissociated from the washing solution.

摘要翻译： 提供了一种补救氰化物污染土壤的方法。 该方法用于修复被氰化物污染的污染物并处理氰化物，其中包括以固体状态收集被第一氰化物污染的土壤，并以气态或溶解状态收集第二氰化物，通过将土壤与碱性洗涤溶液混合来解离氰化物， 将第一氰化物以固态溶解在洗涤溶液中，并将从土壤中分解的溶解状态的第二氰化物转移到洗涤溶液中，使污物从洗涤溶液中解离，将固体状态的第一氰化物沉淀， 含有氰化物的洗涤溶液，并且在固体中沉淀出的第一氰化物后，在第一氰化物上进行后处理从洗涤溶液中解离。

公开(公告)号：US07548469B2

公开(公告)日：2009-06-16

申请号：US11640857

申请日：2006-12-19

申请人： Jae-Young Lee ,  Hong-Jun Lee ,  Jung-Hwa Lee

发明人： Jae-Young Lee ,  Hong-Jun Lee ,  Jung-Hwa Lee

IPC分类号： G11C7/00

CPC分类号： G11C5/145

摘要： A circuit generates a boosted voltage in a semiconductor memory device, where the semiconductor memory device includes a memory cell array having a plurality of non-edge sub-arrays and at least one edge sub-array. The circuit includes a plurality of boosted voltage generators configured to generate a boosted voltage having different current driving capabilities to activate the non-edge sub-arrays and the edge sub-arrays and to supply the boosted voltage to the memory cell array.

摘要翻译： 电路在半导体存储器件中产生升压电压，其中半导体存储器件包括具有多个非边缘子阵列和至少一个边缘子阵列的存储单元阵列。 电路包括多个升压电压发生器，其被配置为产生具有不同电流驱动能力的升压电压，以激活非边缘子阵列和边缘子阵列，并将升压电压提供给存储单元阵列。

公开(公告)号：US20090111232A1

公开(公告)日：2009-04-30

申请号：US12343035

申请日：2008-12-23

申请人： Hyun-Ki Kim ,  Jung-Hwa Lee ,  Ji-Young Kim

发明人： Hyun-Ki Kim ,  Jung-Hwa Lee ,  Ji-Young Kim

IPC分类号： H01L21/762

CPC分类号： H01L29/945 ,  H01L27/0207 ,  H01L27/0805 ,  H01L27/10861 ,  H01L27/10876 ,  H01L27/10894 ,  H01L29/66181 ,  H01L29/66621 ,  H01L29/78

摘要： A semiconductor device having a decoupling capacitor and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate having a cell region, a first peripheral circuit region, and a second peripheral circuit region. At least one channel trench is disposed in the cell region of the semiconductor substrate. At least one first capacitor trench is disposed in the first peripheral circuit region of the semiconductor substrate, and at least one second capacitor trench is disposed in the second peripheral circuit region of the semiconductor substrate. A gate electrode is disposed in the cell region of the semiconductor substrate and fills the channel trench. A first upper electrode is disposed in the first peripheral circuit region of the semiconductor substrate and fills at least the first capacitor trench. A second upper electrode is disposed in the second peripheral circuit region of the semiconductor substrate and fills at least the second capacitor trench. A gate dielectric layer is interposed between the channel trench and the gate electrode. A first dielectric layer is interposed between the semiconductor substrate of the first peripheral circuit region having the first capacitor trench and the first upper electrode and has the same thickness as the gate dielectric layer. A second dielectric layer is interposed between the semiconductor substrate of the second peripheral circuit region having the second capacitor trench and the second upper electrode and has a different thickness from the first dielectric layer.

摘要翻译： 提供具有去耦电容器的半导体器件及其制造方法。 半导体器件包括具有单元区域，第一外围电路区域和第二外围电路区域的半导体衬底。 至少一个通道沟槽设置在半导体衬底的单元区域中。 至少一个第一电容器沟槽设置在半导体衬底的第一外围电路区域中，并且至少一个第二电容器沟槽设置在半导体衬底的第二外围电路区域中。 栅电极设置在半导体衬底的单元区域中并填充沟槽。 第一上电极设置在半导体衬底的第一外围电路区域中，并且填充至少第一电容器沟槽。 第二上电极设置在半导体衬底的第二外围电路区域中，并且填充至少第二电容器沟槽。 栅极电介质层介于通道沟槽和栅电极之间。 在具有第一电容器沟槽的第一外围电路区域的半导体衬底和第一上电极之间插入第一电介质层，并且具有与栅极电介质层相同的厚度。 在具有第二电容器沟槽的第二外围电路区域的半导体衬底和第二上部电极之间插入第二电介质层，并且具有与第一电介质层不同的厚度。

公开(公告)号：US07485911B2

公开(公告)日：2009-02-03

申请号：US11449959

申请日：2006-06-09

申请人： Hyun-Ki Kim ,  Jung-Hwa Lee ,  Ji-Young Kim

发明人： Hyun-Ki Kim ,  Jung-Hwa Lee ,  Ji-Young Kim

IPC分类号： H01L27/108 ,  H01L29/76

CPC分类号： H01L29/945 ,  H01L27/0207 ,  H01L27/0805 ,  H01L27/10861 ,  H01L27/10876 ,  H01L27/10894 ,  H01L29/66181 ,  H01L29/66621 ,  H01L29/78

摘要： A semiconductor device having a decoupling capacitor and a method of fabricating the same are provided. The semiconductor device includes a semiconductor substrate having a cell region, a first peripheral circuit region, and a second peripheral circuit region. At least one channel trench is disposed in the cell region of the semiconductor substrate. At least one first capacitor trench is disposed in the first peripheral circuit region of the semiconductor substrate, and at least one second capacitor trench is disposed in the second peripheral circuit region of the semiconductor substrate. A gate electrode is disposed in the cell region of the semiconductor substrate and fills the channel trench. A first upper electrode is disposed in the first peripheral circuit region of the semiconductor substrate and fills at least the first capacitor trench. A second upper electrode is disposed in the second peripheral circuit region of the semiconductor substrate and fills at least the second capacitor trench. A gate dielectric layer is interposed between the channel trench and the gate electrode. A first dielectric layer is interposed between the semiconductor substrate of the first peripheral circuit region having the first capacitor trench and the first upper electrode and has the same thickness as the gate dielectric layer. A second dielectric layer is interposed between the semiconductor substrate of the second peripheral circuit region having the second capacitor trench and the second upper electrode and has a different thickness from the first dielectric layer.

摘要翻译： 提供具有去耦电容器的半导体器件及其制造方法。 半导体器件包括具有单元区域，第一外围电路区域和第二外围电路区域的半导体衬底。 至少一个通道沟槽设置在半导体衬底的单元区域中。 至少一个第一电容器沟槽设置在半导体衬底的第一外围电路区域中，并且至少一个第二电容器沟槽设置在半导体衬底的第二外围电路区域中。 栅电极设置在半导体衬底的单元区域中并填充沟槽。 第一上电极设置在半导体衬底的第一外围电路区域中，并且填充至少第一电容器沟槽。 第二上电极设置在半导体衬底的第二外围电路区域中，并填充至少第二电容器沟槽。 栅极电介质层介于通道沟槽和栅电极之间。 在具有第一电容器沟槽的第一外围电路区域的半导体衬底和第一上电极之间插入第一电介质层，并且具有与栅极电介质层相同的厚度。 在具有第二电容器沟槽的第二外围电路区域的半导体衬底和第二上部电极之间插入第二电介质层，并且具有与第一电介质层不同的厚度。

公开(公告)号：US07075849B2

公开(公告)日：2006-07-11

申请号：US10786855

申请日：2004-02-24

申请人： Soo-Bong Chang ,  Jung-Hwa Lee ,  Chi-Wook Kim ,  Byong-Mo Moon

发明人： Soo-Bong Chang ,  Jung-Hwa Lee ,  Chi-Wook Kim ,  Byong-Mo Moon

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C5/14

摘要： Embodiments of the invention provide drivers from active internal voltage generating circuits on both sides of the internal voltage generating lines, therefore a voltage level of the internal voltage generating lines can quickly and uniformly reach a desired internal voltage level. Other embodiments of the invention are described in the claims.

摘要翻译： 本发明的实施例提供了内部电压发生线两侧的有源内部电压产生电路的驱动器，因此内部电压发生线的电压电平可以快速均匀地达到期望的内部电压电平。 在权利要求中描述了本发明的其它实施例。

公开(公告)号：US20050036388A1

公开(公告)日：2005-02-17

申请号：US10915036

申请日：2004-08-10

申请人： Chan-Yong Lee ,  Jung-Hwa Lee

发明人： Chan-Yong Lee ,  Jung-Hwa Lee

IPC分类号： G11C11/4091 ,  G11C5/14 ,  G11C7/10 ,  G11C5/00

CPC分类号： G11C7/1069 ,  G11C5/14 ,  G11C7/1012 ,  G11C7/1051

摘要： A semiconductor memory device having a data read path maintains a higher power voltage supplied to an input/output sense amplifier in the input/output path, through which data passes during a data read operation, than the voltage supplied to other circuit components in the data read path, thereby achieving a high data read speed.

摘要翻译： 具有数据读取路径的半导体存储器件在数据读取操作期间保持提供给输入/输出读出放大器的输入/输出读出放大器的电压高于提供给数据中的其它电路元件的电压 读取路径，从而实现高数据读取速度。