公开(公告)号：US09337865B2

公开(公告)日：2016-05-10

申请号：US13934999

申请日：2013-07-03

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Erich F. Haratsch ,  Abdel-Hakim S. Alhussien

IPC: H03M13/00 ,  H03M13/11 ,  H03M13/37 ,  G06F11/10

CPC classification number: H03M13/1108 ,  G06F11/1012 ,  G06F11/108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/618 ,  H03M13/658

Abstract: Described embodiments provide a media controller to read data stored in a media. The media controller determines a value for each bit of a shortened codeword from the media. The shortened codeword includes a plurality of non-shortened bits of a full codeword, where the full codeword includes the plurality of non-shortened bits and one or more shortened bits. Shortened bits correspond to bits unused in the shortened codeword. The media controller converts the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values. The full codeword is decoded using the first set of LLR values for the shortened codeword. The media controller dampens one or more LLR values corresponding to non-shortened bits of the codeword to produce a second set of LLR values and decodes the second set of LLR values.

Abstract translation: 描述的实施例提供了一种媒体控制器来读取存储在媒体中的数据。 媒体控制器确定来自媒体的缩短码字的每一位的值。 缩短的码字包括完整码字的多个未缩短比特，其中，完整码字包括多个非缩短比特和一个或多个缩短的比特。 缩短的比特对应于缩短的码字中未使用的比特。 媒体控制器将缩短的码字的每个位的确定值转换为第一组对数似然比（LLR）值。 使用用于缩短的码字的第一组LLR值对完整码字进行解码。 媒体控制器衰减对应于码字的非缩短比特的一个或多个LLR值，以产生第二组LLR值，并对第二组LLR值进行解码。

公开(公告)号：US20160098318A1

公开(公告)日：2016-04-07

申请号：US14967933

申请日：2015-12-14

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Yunxiang Wu ,  Alexander Hubris ,  Christopher Brewer

IPC: G06F11/10 ,  H03M13/45 ,  G11C29/52

CPC classification number: G06F11/1068 ,  G11C29/52 ,  H03M13/45

Abstract: An apparatus includes one or more error-correction decoders, a buffer, and at least one processor. The buffer may be configured to store data to be decoded by the one or more error-correction decoders. The at least one processor is generally enabled to send messages to the one or more error-correction decoders. The messages may contain datapath control information corresponding to data in the buffer to be decoded by the one or more error-correction decoders. The one or more error-correction decoders are generally enabled to decode the data read from the buffer according to the corresponding datapath control information.

Abstract translation: 一种装置包括一个或多个纠错解码器，缓冲器和至少一个处理器。 缓冲器可以被配置为存储要由一个或多个纠错解码器解码的数据。 通常使能至少一个处理器来向一个或多个纠错解码器发送消息。 消息可以包含与要由一个或多个纠错解码器解码的缓冲器中的数据相对应的数据路径控制信息。 通常，一个或多个错误校正解码器能够根据相应的数据路径控制信息解码从缓冲器读取的数据。

公开(公告)号：US09262084B2

公开(公告)日：2016-02-16

申请号：US14729659

申请日：2015-06-03

Applicant: Seagate Technology LLC

Inventor： Christopher Brewer ,  Earl T. Cohen

IPC: G06F3/00 ,  G06F3/06 ,  G06F13/16 ,  G11C5/04 ,  G06F9/38 ,  G06F12/02 ,  G06F13/38

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0688 ,  G06F9/38 ,  G06F12/0246 ,  G06F13/1694 ,  G06F13/385 ,  G11C5/04

Abstract: An apparatus includes a device interface, a micro-sequencer, and a programmable sequence memory. The device interface may be configured to process a plurality of read/write operations to/from one or more non-volatile memory devices. The micro-sequencer may be configured to communicate with the device interface. The programmable sequence memory is generally readable by the micro-sequencer. In response to the apparatus receiving a command, (a) the micro-sequencer executes a set of instructions starting at a location in the programmable sequence memory according to the command and (b) the micro-sequencer is enabled to perform at least a portion of the command according to a protocol of the one or more non-volatile memory devices, when the one or more non-volatile memory devices are coupled to the device interface.

Abstract translation: 一种装置包括设备接口，微定序器和可编程顺序存储器。 设备接口可以被配置为处理来自一个或多个非易失性存储器设备的多个读/写操作。 微定序器可以被配置为与设备接口通信。 可编程序列存储器通常由微定序器读取。 响应于装置接收到命令，（a）微定序器根据该命令从可编程序存储器中的一个位置开始执行一组指令，并且（b）微定序器能够执行至少一部分 当所述一个或多个非易失性存储器设备耦合到所述设备接口时，根据所述一个或多个非易失性存储器设备的协议来执行所述命令。

公开(公告)号：US20150268870A1

公开(公告)日：2015-09-24

申请号：US14729659

申请日：2015-06-03

Applicant: Seagate Technology LLC

Inventor： Christopher Brewer ,  Earl T. Cohen

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0688 ,  G06F9/38 ,  G06F12/0246 ,  G06F13/1694 ,  G06F13/385 ,  G11C5/04

Abstract: An apparatus includes a device interface, a micro-sequencer, and a programmable sequence memory. The device interface may be configured to process a plurality of read/write operations to/from one or more non-volatile memory devices. The micro-sequencer may be configured to communicate with the device interface. The programmable sequence memory is generally readable by the micro-sequencer. In response to the apparatus receiving a command, (a) the micro-sequencer executes a set of instructions starting at a location in the programmable sequence memory according to the command and (b) the micro-sequencer is enabled to perform at least a portion of the command according to a protocol of the one or more non-volatile memory devices, when the one or more non-volatile memory devices are coupled to the device interface.

Abstract translation: 一种装置包括设备接口，微定序器和可编程顺序存储器。 设备接口可以被配置为处理来自一个或多个非易失性存储器设备的多个读/写操作。 微定序器可以被配置为与设备接口通信。 可编程序列存储器通常由微定序器读取。 响应于装置接收到命令，（a）微定序器根据该命令从可编程序存储器中的一个位置开始执行一组指令，并且（b）微定序器能够执行至少一部分 当所述一个或多个非易失性存储器设备耦合到所述设备接口时，根据所述一个或多个非易失性存储器设备的协议来执行所述命令。

公开(公告)号：US20200272537A1

公开(公告)日：2020-08-27

申请号：US16825148

申请日：2020-03-20

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen

IPC: G06F11/10

Abstract: Higher-level redundancy information computation enables a Solid-State Disk (SSD) controller to provide higher-level redundancy capabilities to maintain reliable operation in a context of failures of non-volatile (e.g. flash) memory elements during operation of an SSD implemented in part by the controller. For example, a first computation is an XOR, and a second computation is a weighted-sum. Various amounts of storage are dedicated to storing the higher-level redundancy information, such as amounts equivalent to an integer multiple of flash die (e.g. one, two, or three entire flash die), and such as amounts equivalent to a fraction of a single flash die (e.g. one-half or one-fourth of a single flash die).

公开(公告)号：US10734087B2

公开(公告)日：2020-08-04

申请号：US16577789

申请日：2019-09-20

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Hao Zhong

IPC: G11C16/34 ,  G11C29/02 ,  G11C16/04 ,  G11C16/26 ,  G01R19/00 ,  G11C16/28 ,  G11C7/14

Abstract: Methods, systems and computer-readable storage media for determining a new optimal read threshold voltage associated with a group of pages of non-volatile memory. It is determined whether the current optimal read threshold voltage associated with the group of pages is out of tolerance based at least in part on a retention drift history associated with the group of pages. Upon determining that the current optimal read threshold voltage is out of tolerance, reference cells associated with the group of pages are written with a pattern having a known statistical distribution of ones and zeroes. The new optimal read threshold voltage associated with the group of pages is determined by reading the reference cells, and the retention drift history associated with the group of pages is updated with the new optimal read threshold voltage and an indication of a new reference cell generation.

公开(公告)号：US20200081660A1

公开(公告)日：2020-03-12

申请号：US16684027

申请日：2019-11-14

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Timothy L. Canepa

IPC: G06F3/06 ,  G06F12/00

Abstract: Methods, systems, and computer-readable storage media for a storage device to, upon receiving a command from a computing host, determine whether or not the command includes location information targeting a particular portion of a NVM of the storage device, the location information having been retrieved by the computing host from a shadow map and included with the command. Upon determining that the command includes location information, the command is processed by the storage device using the included location information. Upon determining that the command does not include location information, the storage device determines the particular portion of the NVM targeted by the command based on a map stored in a memory of the storage device before processing the command.

公开(公告)号：US10191676B2

公开(公告)日：2019-01-29

申请号：US15439459

申请日：2017-02-22

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Robert F. Quinn

IPC: G06F3/06 ,  G11B20/18 ,  G06F12/0842 ,  G06F11/10

Abstract: The disclosure is directed to protecting data of a scalable storage system. A scalable storage system includes a plurality of nodes, each of the nodes having directly-attached storage (DAS), such as one or more hard-disk drives and/or solid-state disk drives. The nodes are coupled via an inter-node communication network, and a substantial entirety of the DAS is globally accessible by each of the nodes. The DAS is protected utilizing intra-node protection to keep data stored in the DAS reliable and globally accessible in presence of a failure within one of the nodes. The DAS is further protected utilizing inter-node protection to keep data stored in the DAS reliable and globally accessible if at least one of the nodes fails.

公开(公告)号：US20170322751A1

公开(公告)日：2017-11-09

申请号：US15661079

申请日：2017-07-27

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen ,  Timothy L. Canepa

IPC: G06F3/06 ,  G06F12/00

CPC classification number: G06F3/0659 ,  G06F3/0607 ,  G06F3/0611 ,  G06F3/0679 ,  G06F12/00 ,  G06F12/1027

Abstract: Methods, systems and computer-readable storage media for receiving, via an external interface of a storage device, a command from a computing host, the command including at least one non-standard command modifier, executing the command according to a particular non-standard command modifier, storing an indication of the particular non-standard command modifier in an entry of a map associated with a logical block address of the command, and storing a shadow copy of the map in a memory of the computing host.

公开(公告)号：US20170046273A1

公开(公告)日：2017-02-16

申请号：US15338718

申请日：2016-10-31

Applicant: Seagate Technology LLC

Inventor： Earl T. Cohen

IPC: G06F12/1009 ,  G06F12/02 ,  G06F11/10 ,  G11C29/52 ,  G11C16/08 ,  G06F3/06

CPC classification number: G06F12/1009 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0661 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/02 ,  G06F12/0246 ,  G06F12/0292 ,  G06F12/04 ,  G06F12/10 ,  G06F2212/2022 ,  G06F2212/401 ,  G06F2212/7201 ,  G06F2212/7202 ,  G11C16/08 ,  G11C29/04 ,  G11C29/52

Abstract: A method for using a variable-size flash translation layer. The method includes reading an entry in a map based on a read logical block address in a read request to obtain both a physical address of a particular page in a memory and information regarding compressed data with a variable size; converting the information to both an address in the particular page and a number of read units in the memory that contain the compressed data; and reading the compressed data from at least the particular page in the memory based on the address and the number of read units.

Abstract translation: 一种使用可变大小闪存转换层的方法。 该方法包括基于读取请求中的读取的逻辑块地址来读取地图中的条目以获得存储器中的特定页面的物理地址以及关于具有可变大小的压缩数据的信息; 将所述信息转换为所述特定页面中的地址和所述存储器中包含所述压缩数据的多个读取单元; 以及基于读取单元的地址和数量从存储器中的至少特定页面读取压缩数据。