Mixed-scale electronic interface
    11.
    发明申请
    Mixed-scale electronic interface 有权
    混合电子接口

    公开(公告)号:US20070176168A1

    公开(公告)日:2007-08-02

    申请号:US11342076

    申请日:2006-01-27

    IPC分类号: H01L29/08

    摘要: Embodiments of the present invention are directed to mixed-scale electronic interfaces, included in integrated circuits and other electronic devices, that provide for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer and nanoscale features of a predominantly nanoscale layer. The predominantly nanoscale layer, in one embodiment of the present invention, comprises a tessellated pattern of submicroscale or microscale pads densely interconnected by nanowire junctions between sets of parallel, closely spaced nanowire bundles. The predominantly submicroscale or microscale layer includes pins positioned complementarily to the submicroscale or microscale pads in the predominantly nanoscale layer.

    摘要翻译: 本发明的实施例涉及包括在集成电路和其他电子设备中的混合比例电子接口,其提供主要是微米级或亚微米级的微尺度特征之间的密集电互连以及主要为纳米尺度层的纳米尺度特征。 在本发明的一个实施方案中,主要是纳米尺度层包括通过平行的,紧密间隔的纳米线束组之间的纳米线结密合地互连的亚微米级或微米级的镶嵌图案。 主要是亚微米级或微尺度层包括与主要是纳米级层中的亚微米级或微尺度焊盘互补定位的引脚。

    AUTONOMOUS EVANESCENT OPTICAL NANOSENSOR
    12.
    发明申请
    AUTONOMOUS EVANESCENT OPTICAL NANOSENSOR 失效
    自动光纤光学传感器

    公开(公告)号:US20070154129A1

    公开(公告)日:2007-07-05

    申请号:US11127542

    申请日:2005-05-11

    IPC分类号: G02B6/00

    摘要: A sensor includes traps that are adjacent to a waveguide and capable of holding a contaminant for an interaction with an evanescent field surrounding the waveguide. When held in a trap, a particle of the contaminant, which may be an atom, a molecule, a virus, or a microbe, scatters light from the waveguide, and the scattered light can be measured to detect the presence or concentration of the contaminant. Holding of the particles permits sensing of the contaminant in a gas where movement of the particles might otherwise be too fast to permit measurement of the interaction with the evanescent field. The waveguide, a lighting system for the waveguide, a photosensor, and a communications interface can all be fabricated on a semiconductor die to permit fabrication of an autonomous nanosensor capable of suspension in the air or a gas being sensed.

    摘要翻译: 传感器包括与波导相邻并且能​​够保持污染物以与与波导周围的ev逝场相互作用的阱。 当保持在陷阱中时,可能是原子,分子,病毒或微生物的污染物的颗粒散射来自波导的光,并且可以测量散射光以检测污染物的存在或浓度 。 保持颗粒允许感测气体中的污染物,其中颗粒的移动可能太快以至于不能测量与渐逝场的相互作用。 波导,用于波导的照明系统,光传感器和通信接口都可以在半导体管芯上制造,以允许制造能够在空气中悬浮的自主纳米传感器或被感测的气体。

    Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays
    13.
    发明申请
    Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays 有权
    纳米尺度和混合微米级/纳米尺寸阵列的基于恒权重代码的寻址

    公开(公告)号:US20070053378A1

    公开(公告)日:2007-03-08

    申请号:US11221036

    申请日:2005-09-06

    IPC分类号: H04J15/00

    摘要: Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars. The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crossbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention include nanoscale memory arrays and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention. Certain of the embodiments of the present invention employ constant-weight codes, a well-known class of error-control-encoding codes, as addressed-nanowire selection voltages applied to microscale output signal lines of microscale/nanoscale encoder-demultiplexers that are selectively interconnected with a set of nanowires.

    摘要翻译: 本发明的各种实施例包括用于确定纳米线寻址方案的方法,并且包括微纳米级纳米级电子器件,其纳入用于在纳米线交叉管内可靠地寻址纳米线结的纳米线寻址方案。 寻址方案允许选择的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态的改变,而不改变剩余的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态,并且不破坏 选择的纳米线 - 交叉结或剩余的未选择的纳米线交叉点结。 本发明的另外的实施例包括结合本发明的纳米线寻址方案实施例的纳米级存储器阵列和其它纳米级电子器件。 本发明的某些实施例采用常规权重代码,众所周知的错误控制编码代码,作为施加到微尺度/纳米级编码器 - 解复用器的微量输出信号线上的寻址纳米线选择电压,其被选择性地互连 与一套纳米线。

    Scalable, component-accessible, and highly interconnected three-dimensional component arrangement within a system
    14.
    发明申请
    Scalable, component-accessible, and highly interconnected three-dimensional component arrangement within a system 有权
    系统内可扩展的,可组件访问的和高度互连的三维组件布置

    公开(公告)号:US20060053397A1

    公开(公告)日:2006-03-09

    申请号:US10935845

    申请日:2004-09-08

    IPC分类号: G06F17/50

    摘要: Embodiments of the present invention include dense, but accessible and well-interconnected component arrangements within multi-component systems, such as high-end multi-processor computer systems, and methods for constructing such arrangements. In a described embodiment, integrated-circuit-containing processing components, referred to as a “flat components,” are arranged into local blocks of intercommunicating flat components. The local flat-component blocks are arranged into interconnected, primitive multi-local-block repeating units, and the primitive local-block repeating units are layered together in a three-dimensional, regularly repeating structure that can be assembled to approximately fill any specified three-dimensional volume. The arrangement provides for relatively short, direct pathways from the surface of the specified volume to any particular local block and flat component within the three-dimensional arrangement.

    摘要翻译: 本发明的实施例包括在诸如高端多处理器计算机系统的多组件系统内的密集但可访问和良好互连的组件布置,以及用于构造这种布置的方法。 在所描述的实施例中,被称为“平面部件”的集成电路的处理部件被布置在相互连通的平面部件的局部块中。 本地平面组件块被布置成互连的原始多局部块重复单元,并且原始局部块重复单元以三维的规则重复的结构分层在一起,其可以被组装以大致填充任何指定的三 维数。 该装置提供从指定体积的表面到三维布置中的任何特定局部块和平坦部件的相对短的直接通路。

    Nanoscale interconnection interface
    15.
    发明申请
    Nanoscale interconnection interface 有权
    纳米级互连接口

    公开(公告)号:US20050193356A1

    公开(公告)日:2005-09-01

    申请号:US11115887

    申请日:2005-04-26

    摘要: One embodiment of the present invention provides a demultiplexer implemented as a nanowire crossbar or a hybrid nanowire/microscale-signal-line crossbar with resistor-like nanowire junctions. The demultiplexer of one embodiment provides demultiplexing of signals input on k microscale address lines to 2k or fewer nanowires, employing supplemental, internal address lines to map 2k nanowire addresses to a larger, internal, n-bit address space, where n>k. A second demultiplexer embodiment of the present invention provides demultiplexing of signals input on n microscale address lines to 2k nanowires, with n>k, using 2k, well-distributed, n-bit external addresses to access the 2k nanowires. Additional embodiments of the present invention include a method for evaluating different mappings of nanowire addresses to internal address-spaces of different sizes, or to evaluate mappings of nanowires to external address-spaces of different sizes, metrics for evaluating address mapping and demultiplexer designs, and demultiplexer design methods.

    摘要翻译: 本发明的一个实施例提供了一种解复用器,其实现为纳米线交叉开关或具有电阻器状纳米线结的混合纳米线/微型信号线交叉开关。 一个实施例的解复用器提供了在k个微米地址线上输入的信号到2k或更少的纳米线的解复用,使用补充的内部地址线将2nm的纳米线地址映射到 较大的内部n位地址空间,其中n> k。 本发明的第二解复用器实施例提供了在n个微米级地址线上输入的信号,其中n≥k,使用2分布良好的二极管, n位外部地址以访问2nm的纳米线。 本发明的另外的实施例包括用于评估纳米线地址与不同大小的内部地址空间的不同映射的方法,或者评估纳米线与不同大小的外部地址空间的映射,用于评估地址映射和解复用器设计的度量,以及 解复用器设计方法。

    Photonic interconnect system
    16.
    发明申请
    Photonic interconnect system 有权
    光子互连系统

    公开(公告)号:US20080112665A1

    公开(公告)日:2008-05-15

    申请号:US12008618

    申请日:2008-01-11

    IPC分类号: G02B6/12

    摘要: A photonic interconnect system avoids high capacitance electric interconnects by using optical signals to communicate data between devices. The system can provide massively parallel information output by mapping logical addresses to frequency bands, so that modulation of a selected frequency band can encode information for a specific location corresponding to the logical address. Wavelength-specific directional couplers, modulators, and detectors for the photonic interconnect system can be efficiently fabricated at defects in a photonic bandgap crystal. The interconnect system can be used for both classical and quantum information processing.

    摘要翻译: 光子互连系统通过使用光信号在设备之间传送数据来避免高电容电互连。 系统可以通过将逻辑地址映射到频带来提供大量并行信息输出,使得所选频带的调制可以对与逻辑地址相对应的特定位置的信息进行编码。 用于光子互连系统的波长特异性定向耦合器,调制器和检测器可以有效地制造在光子带隙晶体的缺陷处。 互连系统可用于经典和量子信息处理。

    Method of controlling nanowire growth and device with controlled-growth nanowire
    18.
    发明申请
    Method of controlling nanowire growth and device with controlled-growth nanowire 审中-公开
    控制纳米线生长和器件的方法

    公开(公告)号:US20070105356A1

    公开(公告)日:2007-05-10

    申请号:US11272347

    申请日:2005-11-10

    IPC分类号: H01L21/20 H01L21/44 C30B11/00

    摘要: Nanowire growth in situ on a planar surface, which is one of a crystalline surface having any crystal orientation, a polycrystalline surface and a non-crystalline surface, is controlled by guiding catalyzed growth of the nanowire from the planar surface in a nano-throughhole of a patterned layer formed on the planar surface, such that the nanowire grows in situ perpendicular to the planar surface. An electronic device includes first and second regions of electronic circuitry vertically spaced by the patterned layer. The nano-throughhole of the patterned layer extends perpendicularly between the regions. The first region has the planar surface. The device further includes a nanowire extending perpendicular from a catalyst location on the planar surface of the first region in the nano-throughhole. The nanowire forms a component of a nano-scale circuit that connects the regions.

    摘要翻译: 在具有任何晶体取向,多晶表面和非结晶表面的晶体表面之一的平坦表面上原位生长的纳米线通过在纳米通孔的纳米通孔中引导纳米线从平坦表面的催化生长来控制 形成在平坦表面上的图案层,使得纳米线垂直于平面表面原位生长。 电子设备包括由图案化层垂直间隔开的电子电路的第一和第二区域。 图案化层的纳米通孔在区域之间垂直延伸。 第一区具有平面。 该装置还包括从纳米通孔中的第一区域的平坦表面上的催化剂位置垂直延伸的纳米线。 纳米线形成连接这些区域的纳米级电路的组件。