公开(公告)号：US11217689B2

公开(公告)日：2022-01-04

申请号：US16545622

申请日：2019-08-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Dean E. Probst ,  Peter A. Burke ,  Prasad Venkatraman

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L29/739 ,  H01L21/765 ,  H01L29/423

Abstract: In one embodiment, a semiconductor device is formed having a plurality of active trenches formed within an active region of the semiconductor device. A first insulator is formed along at least a portion of sidewalls of each active trench. A perimeter termination trench is formed that surrounds the active region. The perimeter termination trench is formed having a first sidewall that is adjacent the active region and a second sidewall that is opposite the first sidewall. An insulator is formed along the second sidewall that has a thickness is greater than an insulator that is formed along the first sidewall.

公开(公告)号：US11776997B2

公开(公告)日：2023-10-03

申请号：US17446238

申请日：2021-08-27

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Shengling Deng ,  Dean E. Probst ,  Zia Hossain

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/739 ,  H01L29/868 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/0653 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/7397 ,  H01L29/7804 ,  H01L29/7813 ,  H01L29/868

Abstract: In a general aspect, a semiconductor device can include a semiconductor region of a first conductivity type and a well region of a second conductivity type. The well region can be disposed in the semiconductor region. An interface between the well region and the semiconductor region can define a diode junction at a depth below an upper surface of the semiconductor region. The semiconductor device can further include at least one dielectric region disposed in the semiconductor region. A dielectric region of the at least one dielectric region can have an upper surface that is disposed in the well region at a depth in the semiconductor region that is above the depth of the diode junction; and a lower surface that is disposed in the semiconductor region at a depth in the semiconductor region that is the same depth as the diode junction or below the depth of the diode junction.

公开(公告)号：US11049956B2

公开(公告)日：2021-06-29

申请号：US16545826

申请日：2019-08-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Dean E. Probst ,  Jeffery A. Neuls ,  Masaichi Eda ,  Peter A. Burke ,  Peter McGrath ,  Prasad Venkatraman

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/423

Abstract: In one embodiment, a method of forming a semiconductor device forms gate trenches in a semiconductor substrate. A portion of the material between the trenches is narrowed and another material is formed on sidewalls of the narrowed portion that is substantially not etched by an etchant that etches the material of the portion of the material between the trenches. Source and gate contact openings are formed together.

公开(公告)号：US10600905B1

公开(公告)日：2020-03-24

申请号：US16128139

申请日：2018-09-11

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Prasad Venkatraman ,  Dean E. Probst

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/417

Abstract: A device has an active area made of an array of first type of device cells and a gate or shield contact area made of an array of a second type of device cells that are laid out at a wider pitch than the array of first type of device cells. Each device cell in the active area includes a trench that contains a gate electrode and an adjoining mesa that contains the drain, source, body, and channel regions of the device. The second type of device cell includes a trench that is wider than the trench in the first device cell, but a mesa of the second type of device cell has about the same width as the mesa of the first type of device cell. Having about the same width, the mesa in the second type of device cell in the contact area has similar breakdown characteristics as a mesa in the first type of device cell in the active area of the device.

公开(公告)号：US10340372B1

公开(公告)日：2019-07-02

申请号：US15943914

申请日：2018-04-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Takashi Ogura ,  Mitsuru Soma ,  Dean E. Probst ,  Takashi Hiroshima ,  Peter A. Burke ,  Toshimitsu Taniguchi

IPC: H01L29/739 ,  H01L29/423 ,  H01L29/10 ,  H01L29/78 ,  H01L29/732

Abstract: In at least one general aspect, an apparatus can include a first trench disposed in a semiconductor region and including a gate electrode, and a second trench disposed in the semiconductor region. The apparatus can include a mesa region disposed between the first trench and the second trench, and a source region of a first conductivity type disposed in a top portion of the mesa region. The apparatus can include an epitaxial layer of the first conductivity type, and a body region of a second conductivity type disposed in the mesa region and disposed between the source region and the epitaxial layer of the first conductivity type. The apparatus can include a pillar of the second conductivity type disposed in the mesa region such that a first portion of the source region is disposed lateral to the pillar and a second portion of the source region is disposed above the pillar.