公开(公告)号：US11075148B2

公开(公告)日：2021-07-27

申请号：US16675525

申请日：2019-11-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jeffrey Peter Gambino ,  David T. Price ,  Jeffery A. Neuls ,  Dean E. Probst ,  Santosh Menon ,  Peter A. Burke ,  Bigildis Dosdos

IPC: H01L23/00 ,  H01L23/495 ,  H01L25/00 ,  H01L25/11

Abstract: A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.

公开(公告)号：US12051967B2

公开(公告)日：2024-07-30

申请号：US17806597

申请日：2022-06-13

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Dean E. Probst ,  Joseph Andrew Yedinak ,  Balaji Padmanabhan ,  Peter A Burke ,  Jeffery A. Neuls ,  Ashok Challa

IPC: H02M1/34 ,  H01L27/07

CPC classification number: H02M1/34 ,  H01L27/0727

Abstract: In some aspects, the techniques described herein relate to a circuit including: a metal-oxide semiconductor field-effect transistor (MOSFET) including a gate, a source, and a drain; and a snubber circuit coupled between the drain and the source, the snubber circuit including: a diode having a cathode and an anode, the cathode being coupled with the drain; a capacitor having a first terminal coupled with the anode, and a second terminal coupled with the source; and a resistor having a first terminal coupled with the anode and the first terminal of the capacitor, and a second terminal coupled with the source.

公开(公告)号：US11049956B2

公开(公告)日：2021-06-29

申请号：US16545826

申请日：2019-08-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Dean E. Probst ,  Jeffery A. Neuls ,  Masaichi Eda ,  Peter A. Burke ,  Peter McGrath ,  Prasad Venkatraman

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/423

Abstract: In one embodiment, a method of forming a semiconductor device forms gate trenches in a semiconductor substrate. A portion of the material between the trenches is narrowed and another material is formed on sidewalls of the narrowed portion that is substantially not etched by an etchant that etches the material of the portion of the material between the trenches. Source and gate contact openings are formed together.