公开(公告)号：US12243778B2

公开(公告)日：2025-03-04

申请号：US18525212

申请日：2023-11-30

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mitsuru Soma ,  Masahiro Shimbo ,  Masaki Kuramae ,  Kouhei Uchida

IPC: H01L21/768 ,  H01L21/265 ,  H01L21/308 ,  H01L21/3213 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices made by forming hard mask pillars on a surface of a substrate, forming sacrificial spacers on a first side of each hard mask pillar and a second side of each hard mask pillar. The open gaps may be formed between adjacent sacrificial spacers. The semiconductor devices may also be formed by etching the hard mask pillars to form pillar gaps, etching gate trenches into the substrate through the open gaps and the pillar gaps, forming a gate electrode within the gate trenches, implanting channels and sources in the substrate below the sacrificial spacers, forming an insulator layer around the sacrificial spacers, etching the sacrificial spacers to form contact trenches within the substrate, and filling the contact trenches with a conductive material to form contacts.

公开(公告)号：US11876018B2

公开(公告)日：2024-01-16

申请号：US17114668

申请日：2020-12-08

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mitsuru Soma ,  Masahiro Shimbo ,  Masaki Kuramae ,  Kouhei Uchida

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L29/10 ,  H01L21/768 ,  H01L29/423 ,  H01L21/265 ,  H01L21/308 ,  H01L21/3213

CPC classification number: H01L21/76897 ,  H01L21/26586 ,  H01L21/3086 ,  H01L21/32139 ,  H01L29/401 ,  H01L29/41741 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/105 ,  H01L29/7813

Abstract: Semiconductor devices made by forming hard mask pillars on a surface of a substrate, forming sacrificial spacers on a first side of each hard mask pillar and a second side of each hard mask pillar. The open gaps may be formed between adjacent sacrificial spacers. The semiconductor devices may also be formed by etching the hard mask pillars to form pillar gaps, etching gate trenches into the substrate through the open gaps and the pillar gaps, forming a gate electrode within the gate trenches, implanting channels and sources in the substrate below the sacrificial spacers, forming an insulator layer around the sacrificial spacers, etching the sacrificial spacers to form contact trenches within the substrate, and filling the contact trenches with a conductive material to form contacts.

公开(公告)号：US11670693B2

公开(公告)日：2023-06-06

申请号：US17248512

申请日：2021-01-28

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mitsuru Soma

IPC: H01L29/417 ,  H01L29/40 ,  H01L29/66 ,  H01L21/265 ,  H01L21/765 ,  H01L29/78

CPC classification number: H01L29/41741 ,  H01L21/26513 ,  H01L21/765 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7813

Abstract: In a general aspect, a field-effect transistor (FET) can include a semiconductor region, and a trench disposed in the semiconductor region. The FET can also include a trench gate disposed in an upper portion of the trench in an active region of the FET. The FET can further include a conductive runner disposed in a bottom portion of the trench. The conductive runner can be electrically coupled with a drain terminal of the FET. A portion of the conductive runner can be disposed in the active region below the trench gate.

公开(公告)号：US11437507B2

公开(公告)日：2022-09-06

申请号：US17060280

申请日：2020-10-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter A. Burke ,  Mitsuru Soma

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/66 ,  H01L29/40 ,  H01L21/765

Abstract: A semiconductor device includes a region of semiconductor material and a trench gate structure. The trench gate structure includes an active trench, a shield dielectric layer in a lower portion of the active trench, and a shield electrode of a first polycrystalline semiconductor material adjacent to the shield dielectric layer. A gate dielectric layer is adjacent to an upper portion of the active trench and a gate electrode of a second polycrystalline semiconductor material is adjacent to the gate dielectric layer. A shield conductive layer of a first conductive material is adjacent to the shield electrode and a gate conductive layer of the first conductive material is adjacent to the gate electrode. A dielectric fill structure is in the active trench electrically isolating the gate electrode and the gate conductive layer from the shield electrode and the shield conductive layer. In some examples, the semiconductor device includes a trench shield contact structure that includes the shield conductive layer.

公开(公告)号：US10340372B1

公开(公告)日：2019-07-02

申请号：US15943914

申请日：2018-04-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Takashi Ogura ,  Mitsuru Soma ,  Dean E. Probst ,  Takashi Hiroshima ,  Peter A. Burke ,  Toshimitsu Taniguchi

IPC: H01L29/739 ,  H01L29/423 ,  H01L29/10 ,  H01L29/78 ,  H01L29/732

Abstract: In at least one general aspect, an apparatus can include a first trench disposed in a semiconductor region and including a gate electrode, and a second trench disposed in the semiconductor region. The apparatus can include a mesa region disposed between the first trench and the second trench, and a source region of a first conductivity type disposed in a top portion of the mesa region. The apparatus can include an epitaxial layer of the first conductivity type, and a body region of a second conductivity type disposed in the mesa region and disposed between the source region and the epitaxial layer of the first conductivity type. The apparatus can include a pillar of the second conductivity type disposed in the mesa region such that a first portion of the source region is disposed lateral to the pillar and a second portion of the source region is disposed above the pillar.

公开(公告)号：US10892188B2

公开(公告)日：2021-01-12

申请号：US16449890

申请日：2019-06-24

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Mitsuru Soma ,  Masahiro Shimbo ,  Masaki Kuramae ,  Kouhei Uchida

IPC: H01L29/40 ,  H01L29/41 ,  H01L29/43 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L21/768 ,  H01L29/423 ,  H01L21/265 ,  H01L29/417 ,  H01L21/308

Abstract: Semiconductor devices made by forming hard mask pillars on a surface of a substrate, forming sacrificial spacers on a first side of each hard mask pillar and a second side of each hard mask pillar. The open gaps may be formed between adjacent sacrificial spacers. The semiconductor devices may also be formed by etching the hard mask pillars to form pillar gaps, etching gate trenches into the substrate through the open gaps and the pillar gaps, forming a gate electrode within the gate trenches, implanting channels and sources in the substrate below the sacrificial spacers, forming an insulator layer around the sacrificial spacers, etching the sacrificial spacers to form contact trenches within the substrate, and filling the contact trenches with a conductive material to form contacts.