公开(公告)号：US20190288093A1

公开(公告)日：2019-09-19

申请号：US16429176

申请日：2019-06-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Yukinori SHIMA ,  Hajime TOKUNAGA ,  Toshinari SASAKI ,  Keisuke MURAYAMA ,  Daisuke MATSUBAYASHI

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/51 ,  H01L21/02 ,  H01L27/12

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

公开(公告)号：US20180294363A1

公开(公告)日：2018-10-11

申请号：US16003145

申请日：2018-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Yukinori SHIMA ,  Hajime TOKUNAGA ,  Toshinari SASAKI ,  Keisuke MURAYAMA ,  Daisuke MATSUBAYASHI

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/51 ,  H01L21/02 ,  H01L29/24

Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

公开(公告)号：US20130285047A1

公开(公告)日：2013-10-31

申请号：US13865435

申请日：2013-04-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Keisuke MURAYAMA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/78696

Abstract: A transistor including an oxide semiconductor film, in which the threshold voltage is prevented from being a negative value, is provided. A high quality semiconductor device having the transistor including an oxide semiconductor film is provided. A transistor includes an oxide semiconductor film having first to third regions. The top surface of the oxide semiconductor film in the first region is in contact with a source electrode or a drain electrode. The top surface of the oxide semiconductor film in the second region is in contact with a protective insulating film. The thickness of the second region is substantially uniform and smaller than the maximum thickness of the first region. The top surface and a side surface of the oxide semiconductor film in the third region are in contact with the protective insulating film.

Abstract translation: 提供了包括其中阈值电压被防止为负值的氧化物半导体膜的晶体管。 提供具有包括氧化物半导体膜的晶体管的高质量半导体器件。 晶体管包括具有第一至第三区域的氧化物半导体膜。 第一区域中的氧化物半导体膜的顶表面与源电极或漏电极接触。 第二区域中的氧化物半导体膜的顶表面与保护绝缘膜接触。 第二区域的厚度基本上均匀且小于第一区域的最大厚度。 第三区域中的氧化物半导体膜的顶表面和侧表面与保护绝缘膜接触。

公开(公告)号：US20240079479A1

公开(公告)日：2024-03-07

申请号：US18388883

申请日：2023-11-13

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Yukinori SHIMA ,  Hajime TOKUNAGA ,  Toshinari SASAKI ,  Keisuke MURAYAMA ,  Daisuke MATSUBAYASHI

IPC: H01L29/66 ,  H01L21/02 ,  H01L27/12 ,  H01L29/51 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/022 ,  H01L21/02263 ,  H01L27/1225 ,  H01L29/513 ,  H01L29/78609 ,  H01L29/7869

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

公开(公告)号：US20200287026A1

公开(公告)日：2020-09-10

申请号：US16878758

申请日：2020-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Yukinori SHIMA ,  Hajime TOKUNAGA ,  Toshinari SASAKI ,  Keisuke MURAYAMA ,  Daisuke MATSUBAYASHI

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/51 ,  H01L29/786 ,  H01L27/12

Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve the electrical characteristics and the reliability of a semiconductor device including an oxide semiconductor film. In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

公开(公告)号：US20190074378A1

公开(公告)日：2019-03-07

申请号：US16180210

申请日：2018-11-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Keisuke MURAYAMA

IPC: H01L29/786 ,  H01L29/78

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.

公开(公告)号：US20160336355A1

公开(公告)日：2016-11-17

申请号：US15223079

申请日：2016-07-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Hideaki SHISHIDO ,  Jun KOYAMA ,  Daisuke MATSUBAYASHI ,  Keisuke MURAYAMA

IPC: H01L27/12 ,  G02F1/1343 ,  G02F1/1362 ,  H01L29/786 ,  G02F1/1368

CPC classification number: H01L27/1255 ,  G02F1/1339 ,  G02F1/134363 ,  G02F1/13454 ,  G02F1/13458 ,  G02F1/136204 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2201/40 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/3265 ,  H01L29/7869

Abstract: To provide a semiconductor device including a capacitor whose charge capacity is increased without reducing the aperture ratio. The semiconductor device includes a transistor including a light-transmitting semiconductor film, a capacitor where a dielectric film is provided between a pair of electrodes, an insulating film provided over the light-transmitting semiconductor film, and a light-transmitting conductive film provided over the insulating film. In the capacitor, a metal oxide film containing at least indium (In) or zinc (Zn) and formed on the same surface as the light-transmitting semiconductor film in the transistor serves as one electrode, the light-transmitting conductive film serves as the other electrode, and the insulating film provided over the light-transmitting semiconductor film serves as the dielectric film.

Abstract translation: 提供一种包括电容器的半导体器件，其电容量增加而不降低开口率。 半导体器件包括：晶体管，包括透光半导体膜，电容器，其中电介质膜设置在一对电极之间;绝缘膜设置在透光半导体膜上;以及透光导电膜， 绝缘膜。 在电容器中，与晶体管中的透光性半导体膜相同的表面上形成至少含有铟（In）或锌（Zn）的金属氧化物膜作为一个电极，透光性导电膜作为 设置在透光半导体膜上的绝缘膜用作电介质膜。

公开(公告)号：US20130270552A1

公开(公告)日：2013-10-17

申请号：US13860792

申请日：2013-04-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Keisuke MURAYAMA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/7831

Abstract: A transistor includes oxide semiconductor stacked layers between a first gate electrode layer and a second gate electrode layer through an insulating layer interposed between the first gate electrode layer and the oxide semiconductor stacked layers and an insulating layer interposed between the second gate electrode layer and the oxide semiconductor stacked layers. The thickness of a channel formation region is smaller than the other regions in the oxide semiconductor stacked layers. Further in this transistor, one of the gate electrode layers is provided as what is called a back gate for controlling the threshold voltage. Controlling the potential applied to the back gate enables control of the threshold voltage of the transistor, which makes it easy to maintain the normally-off characteristics of the transistor.