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公开(公告)号:US20230022181A1
公开(公告)日:2023-01-26
申请号:US17887708
申请日:2022-08-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Takayuki IKEDA , Hidetomo KOBAYASHI , Hideaki SHISHIDO , Kiyotaka KIMURA , Takashi NAKAGAWA , Kosei NEI
IPC: G09G3/3275 , G09G3/3233 , G09G3/3266 , G09G5/377 , H01L27/32 , H01L29/786
Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
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公开(公告)号:US20210295780A1
公开(公告)日:2021-09-23
申请号:US17055285
申请日:2019-05-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Takayuki IKEDA , Hidetomo KOBAYASHI , Hideaki SHISHIDO , Kiyotaka KIMURA , Takashi NAKAGAWA , Kosei NEI
IPC: G09G3/3275 , H01L27/32 , H01L29/786 , G09G3/3266 , G09G5/377 , G09G3/3233
Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
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公开(公告)号:US20180286886A1
公开(公告)日:2018-10-04
申请号:US15925122
申请日:2018-03-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hajime KIMURA , Tsutomu MURAKAWA , Kosei NEI , Hiroaki HONDA , Yusuke SHINO
IPC: H01L27/12 , G11C11/404 , H01L29/786 , H01L27/06 , H01L21/84
Abstract: A semiconductor device which can suppress leakage current between a wiring and a connection electrode connected to a floating node is provided. The semiconductor device includes a first insulator, a first conductor over the first insulator, a second conductor over the first insulator, and a second insulator over the first insulator, the first conductor, and the second conductor. The first conductor and the second conductor contain a metal A (one kind or a plurality of kinds of aluminum, copper, tungsten, chromium, silver, gold, platinum, tantalum, nickel, molybdenum, magnesium, beryllium, indium, and ruthenium). The metal A is detected in an interface between the first insulator and the second insulator by an energy dispersive X-ray spectroscopy (EDX). The second insulator includes a groove for exposing the first insulator between the first conductor and the second conductor.
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公开(公告)号:US20160336433A1
公开(公告)日:2016-11-17
申请号:US15223002
申请日:2016-07-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshinori ANDO , Hidekazu MIYAIRI , Naoto YAMADE , Asako HIGA , Miki SUZUKI , Yoshinori IEDA , Yasutaka SUZUKI , Kosei NEI , Shunpei YAMAZAKI
IPC: H01L29/66 , H01L21/4757 , H01L27/088 , H01L21/477
CPC classification number: H01L29/66969 , C23C14/086 , C23C14/351 , H01L21/0214 , H01L21/0217 , H01L21/02318 , H01L21/469 , H01L21/4757 , H01L21/477 , H01L21/8221 , H01L27/0688 , H01L27/088 , H01L27/1225 , H01L27/1255 , H01L27/1259 , H01L29/78603 , H01L29/78606 , H01L29/7869 , H01L29/78693
Abstract: To improve the electrical characteristics of a semiconductor device including an oxide semiconductor, and to provide a highly reliable semiconductor device with a small variation in electrical characteristics. The semiconductor device includes a first insulating film, a first barrier film over the first insulating film, a second insulating film over the first barrier film, and a first transistor including a first oxide semiconductor film over the second insulating film. The amount of hydrogen molecules released from the first insulating film at a given temperature higher than or equal to 400° C., which is measured by thermal desorption spectroscopy, is less than or equal to 130% of the amount of released hydrogen molecules at 300° C. The second insulating film includes a region containing oxygen at a higher proportion than oxygen in the stoichiometric composition.
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15.
公开(公告)号:US20150221754A1
公开(公告)日:2015-08-06
申请号:US14688199
申请日:2015-04-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Suguru HONDO , Akihisa SHIMOMURA , Masaki KOYAMA , Motomu KURATA , Kazuya HANAOKA , Sho NAGAMATSU , Kosei NEI , Toru HASEGAWA
CPC classification number: H01L29/66969 , H01L21/46 , H01L29/78618 , H01L29/7869 , H01L29/78693 , H01L29/78696
Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.
Abstract translation: 提供具有稳定电特性的包括氧化物半导体膜的晶体管。 还提供了具有优异的导通状态特性的包括氧化物半导体膜的晶体管。 其中形成具有低电阻的氧化物半导体膜并且氧化物半导体膜的沟道区的电阻增加的半导体器件。 注意,氧化物半导体膜经受用于降低电阻以降低电阻的工艺。 用于降低氧化物半导体膜的电阻的方法可以是例如在高于或等于450℃且低于或等于740℃的温度下的激光处理或热处理。 例如,可以通过等离子体氧化或氧离子的注入来提高具有低电阻的氧化物半导体膜的沟道区域的电阻的方法。
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