公开(公告)号：US20220328694A1

公开(公告)日：2022-10-13

申请号：US17844767

申请日：2022-06-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786 ,  H01L29/417

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

公开(公告)号：US20190181159A1

公开(公告)日：2019-06-13

申请号：US16266263

申请日：2019-02-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hideomi SUZAWA ,  Yuta ENDO ,  Kazuya HANAOKA

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device with reduced parasitic capacitance is provided. The semiconductor device includes a first insulating layer; a first oxide layer over the first insulating layer; a semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer over the semiconductor layer; a second insulating layer over the first insulating layer; a third insulating layer over the second insulating layer, the source electrode layer, and the drain electrode layer; a second oxide layer over the semiconductor layer; a gate insulating layer over the second oxide layer; a gate electrode layer over the gate insulating layer; and a fourth insulating layer over the third insulating layer, the second oxide layer, the gate insulating layer, and the gate electrode layer.

公开(公告)号：US20160351694A1

公开(公告)日：2016-12-01

申请号：US15233034

申请日：2016-08-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kazuya HANAOKA ,  Naoto KUSUMOTO

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/45 ,  H01L21/02 ,  H01L27/12

CPC classification number: H01L29/66969 ,  H01L21/0262 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/307 ,  H01L29/2206 ,  H01L29/247 ,  H01L29/45 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device with a structure in which an increase in the number of oxygen vacancies in an oxide semiconductor layer can be suppressed and a method for manufacturing the semiconductor device are provided. The semiconductor device includes an oxide insulating layer; intermediate layers apart from each other over the oxide insulating layer; a source electrode layer and a drain electrode layer over the intermediate layers; an oxide semiconductor layer that is electrically connected to the source electrode layer and the drain electrode layer and is in contact with the oxide insulating layer; a gate insulating film over the source electrode layer, the drain electrode layer, and the oxide semiconductor layer; and a gate electrode layer that is over the gate insulating film and overlaps with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer.

公开(公告)号：US20160163870A1

公开(公告)日：2016-06-09

申请号：US14961016

申请日：2015-12-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Takahisa ISHIYAMA ,  Kazuya HANAOKA

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/467 ,  H01L29/66 ,  H01L21/4763

CPC classification number: H01L29/7869 ,  H01L21/02178 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78696

Abstract: Provided is a semiconductor device which can suppress an increase in oxygen vacancies in an oxide semiconductor layer and a manufacturing method of the semiconductor device. The semiconductor device includes a first oxide semiconductor layer over the first insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer each over the third oxide semiconductor layer; a fourth semiconductor layer over the source and drain electrode layers, and the third oxide semiconductor layer; a gate insulating layer over the fourth oxide semiconductor layer; a gate electrode layer over the gate electrode layer and overlapping with the source and drain electrode layers, and the fourth oxide semiconductor layer; and a second insulating layer over the first insulating layer, and the source, gate, and drain electrode layers.

Abstract translation: 提供一种能够抑制氧化物半导体层的氧空位增加的半导体装置及半导体装置的制造方法。 半导体器件包括在第一绝缘层上的第一氧化物半导体层; 在所述第一氧化物半导体层上的第二氧化物半导体层; 在所述第二氧化物半导体层上的第三氧化物半导体层; 每个在所述第三氧化物半导体层上的源电极层和漏电极层; 在源极和漏极电极层上的第四半导体层和第三氧化物半导体层; 在第四氧化物半导体层上的栅极绝缘层; 在栅电极层上方并与源电极层和漏电极层重叠的栅电极层和第四氧化物半导体层; 以及第一绝缘层上的第二绝缘层，以及源极，栅极和漏极电极层。

公开(公告)号：US20130320332A1

公开(公告)日：2013-12-05

申请号：US13897502

申请日：2013-05-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Suguru HONDO ,  Akihisa SHIMOMURA ,  Masaki KOYAMA ,  Motomu KURATA ,  Kazuya HANAOKA ,  Sho NAGAMATSU ,  Kosei NEI ,  Toru HASEGAWA

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/46 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region of the oxide semiconductor film is increased. Note that an oxide semiconductor film is subjected to a process for reducing the resistance to have low resistance. The process for reducing the resistance of the oxide semiconductor film may be a laser process or heat treatment at a temperature higher than or equal to 450° C. and lower than or equal to 740° C., for example. A process for increasing the resistance of the channel region of the oxide semiconductor film having low resistance may be performed by plasma oxidation or implantation of oxygen ions, for example.

公开(公告)号：US20200105942A1

公开(公告)日：2020-04-02

申请号：US16703175

申请日：2019-12-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Daigo ITO ,  Takahisa ISHIYAMA ,  Katsuaki TOCHIBAYASHI ,  Kazuya HANAOKA

IPC: H01L29/786 ,  H01L21/67 ,  H01L27/146 ,  H01L29/04 ,  H01L29/423 ,  H01L29/66 ,  H01L27/12

Abstract: The semiconductor device includes a first insulating layer; a first oxide insulating layer over the first insulating layer; an oxide semiconductor layer over the first oxide insulating layer; a source electrode layer and a drain electrode layer over the oxide semiconductor layer; a second oxide insulating layer over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a gate insulating layer over the second oxide insulating layer; a gate electrode layer over the gate insulating layer; a second insulating layer over the first insulating layer the source electrode layer, the drain electrode layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer, and a third insulating layer over the first insulating layer, the source electrode layer, the drain electrode layer, and the second insulating layer.

公开(公告)号：US20140339544A1

公开(公告)日：2014-11-20

申请号：US14277465

申请日：2014-05-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke Matsubayashi ,  Yoshiyuki Kobayashi ,  Shunpei Yamazaki ,  Shinpei Matsuda

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/41733 ,  H01L29/785 ,  H01L29/7854 ,  H01L29/78696

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.

Abstract translation: 可以抑制半导体装置小型化时变得更显着的电特性劣化的半导体装置。 半导体器件包括第一氧化物膜，第一氧化物膜上的氧化物半导体膜，与氧化物半导体膜接触的源电极和漏电极，氧化物半导体膜上的第二氧化物膜，源电极和 漏电极，第二氧化膜上的栅极绝缘膜，以及与栅极绝缘膜接触的栅电极。 氧化物半导体膜的顶端部在通道宽度方向观察时呈弯曲状。

公开(公告)号：US20140326992A1

公开(公告)日：2014-11-06

申请号：US14258528

申请日：2014-04-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Suguru HONDO ,  Kazuya HANAOKA ,  Shinya SASAGAWA ,  Naoto KUSUMOTO

IPC: H01L29/786

CPC classification number: H01L29/78696 ,  H01L29/41733 ,  H01L29/7869

Abstract: Provided is a semiconductor device that can be miniaturized in a simple process and that can prevent deterioration of electrical characteristics due to miniaturization. The semiconductor device includes an oxide semiconductor layer, a first conductor in contact with the oxide semiconductor layer, and an insulator in contact with the first conductor. Further, an opening portion is provided in the oxide semiconductor layer, the first conductor, and the insulator. In the opening portion, side surfaces of the oxide semiconductor layer, the first conductor, and the insulator are aligned, and the oxide semiconductor layer and the first conductor are electrically connected to a second conductor by side contact.

Abstract translation: 提供了可以在简单的工艺中小型化并且可以防止由于小型化导致的电特性劣化的半导体器件。 半导体器件包括氧化物半导体层，与氧化物半导体层接触的第一导体和与第一导体接触的绝缘体。 此外，在氧化物半导体层，第一导体和绝缘体中设置有开口部。 在开口部分中，氧化物半导体层，第一导体和绝缘体的侧表面被对准，并且氧化物半导体层和第一导体通过侧面接触电连接到第二导体。

公开(公告)号：US20130092940A1

公开(公告)日：2013-04-18

申请号：US13646084

申请日：2012-10-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki TEZUKA ,  Atsuo ISOBE ,  Takehisa HATANO ,  Kazuya HANAOKA

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/66969 ,  H01L21/463 ,  H01L21/465 ,  H01L29/41733 ,  H01L29/41783 ,  H01L29/7869

Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.

公开(公告)号：US20170271523A1

公开(公告)日：2017-09-21

申请号：US15617696

申请日：2017-06-08

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazuya HANAOKA ,  Daisuke MATSUBAYASHI ,  Yoshiyuki KOBAYASHI ,  Shunpei YAMAZAKI ,  Shinpei MATSUDA

IPC: H01L29/786

Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.