Abstract:
A stack-type nonvolatile semiconductor device comprises a memory device formed on a substrate including a semiconductor body elongated in one direction, having a cross section perpendicular to a main surface, having a predetermined curvature, a channel region on the semiconductor body along the circumference, a tunneling insulating layer on the channel region, a floating gate on the tunneling insulating layer, insulated from the channel region, a high dielectric constant material layer on the floating gate, a metallic control gate on the high dielectric constant material layer, insulated from the floating gate, and source and drain regions adjacent to the metallic control gate on the semiconductor body, an inter-insulating layer on the memory device, and a conductive layer on the inter-insulating layer, and a memory device formed on the conductive layer including, a semiconductor body elongated in one direction having a cross section perpendicular to a main surface, having a predetermined curvature, a channel region along the circumference of the semiconductor body, a tunneling insulating layer on the channel region, a floating gate on the tunneling insulating layer, electrically insulated from the channel region, a high dielectric constant material layer on the floating gate, a metallic control gate on the high dielectric constant material layer, insulated from the floating gate, and source and drain regions adjacent to the metallic control gate.
Abstract:
A stack-type nonvolatile semiconductor device comprises a memory device formed on a substrate including a semiconductor body elongated in one direction, having a cross section perpendicular to a main surface, having a predetermined curvature, a channel region on the semiconductor body along the circumference, a tunneling insulating layer on the channel region, a floating gate on the tunneling insulating layer, insulated from the channel region, a high dielectric constant material layer on the floating gate, a metallic control gate on the high dielectric constant material layer, insulated from the floating gate, and source and drain regions adjacent to the metallic control gate on the semiconductor body, an inter-insulating layer on the memory device, and a conductive layer on the inter-insulating layer, and a memory device formed on the conductive layer including, a semiconductor body elongated in one direction having a cross section perpendicular to a main surface, having a predetermined curvature, a channel region along the circumference of the semiconductor body, a tunneling insulating layer on the channel region, a floating gate on the tunneling insulating layer, electrically insulated from the channel region, a high dielectric constant material layer on the floating gate, a metallic control gate on the high dielectric constant material layer, insulated from the floating gate, and source and drain regions adjacent to the metallic control gate.
Abstract:
Disclosed herein is a plate-shaped secondary battery constructed in a structure in which an electrode assembly of a cathode/separator/anode structure is mounted in a battery case, and the battery case is sealed by thermal welding, wherein the secondary battery has at least one-way exhaust member, mounted at a sealed portion, formed at the outer circumference of an electrode assembly receiving part of the battery case, for allowing internal high-pressure gas to be exhausted out of a battery cell and preventing external gas from being introduced into the battery cell. The secondary battery according to the present invention has the effect of effectively exhausting internal high-pressure gas generated during the abnormal operation of the battery, such as overcharge, out of the battery case, while maintaining the sealability of the battery case, thereby simultaneously improving the efficiency and safety of the battery.
Abstract:
Disclosed herein is a secondary battery including an electrode assembly of a cathode/separator/anode structure mounted in a pouch-shaped battery case in a sealed state, wherein a residue portion, which is not sealed (non-sealing residue portion), is defined between a sealing portion of the battery case and the electrode assembly for collecting generated gas, and the non-sealing residue portion is formed by mounting the electrode assembly between upper and lower laminate sheets, at least one of which has a receiving part of a size approximately corresponding to the electrode assembly, sealing three sides of the upper and lower laminate sheets, including two sides where electrode terminals are disposed, among four sides of the upper and lower laminate sheets, injecting an electrolyte in the battery case through the non-sealing portion, and sealing the non-sealing portion such that the resultant sealing portion is spaced a predetermined width from the receiving part.
Abstract:
Disclosed herein is a plate-shaped secondary battery constructed in a structure in which an electrode assembly of a cathode/separator/anode structure is mounted in a battery case, and the battery case is sealed by thermal welding, wherein the secondary battery has at least one-way exhaust member, mounted at a sealed portion, formed at the outer circumference of an electrode assembly receiving part of the battery case, for allowing internal high-pressure gas to be exhausted out of a battery cell and preventing external gas from being introduced into the battery cell. The secondary battery according to the present invention has the effect of effectively exhausting internal high-pressure gas generated during the abnormal operation of the battery, such as overcharge, out of the battery case, while maintaining the sealability of the battery case, thereby simultaneously improving the efficiency and safety of the battery.
Abstract:
Provided is a semiconductor device for applying common source lines with individual bias voltages. The device includes a substrate, cell transistors arrayed in a cell matrix shape on the substrate and configured to have gate insulating patterns, gate electrodes, common source regions, drain regions and channel regions. Word lines are configured to electrically interconnect the gate electrodes with each other. Common source lines are shared between only a pair of the neighboring word lines and are configured to electrically interconnect the common source regions with each other. Drain metal contacts and source metal contacts are arranged in a straight line on the drain regions. Bit lines are electrically connected to the drain metal contacts. And impurity regions are configured to control the threshold voltage of the channel regions.
Abstract:
A semiconductor flash memory device. The flash memory device includes a floating gate electrode disposed in a recess having slanted sides in a semiconductor substrate. A gate insulation film is interposed between the floating gate electrode and the semiconductor substrate. A control gate electrode is disposed over the floating gate electrode. The floating gate electrode includes projections adjacent to the slanted sides of the recess.
Abstract:
In a non-volatile memory device and methods of forming and operating the same, one memory transistor includes sidewall selection gates covering both sidewalls of a floating gate when the floating gate and a control gate are stacked. The sidewall selection gates are in a spacer form. Since the sidewall selection gates are in a spacer form on the sidewall of the floating gate, the degree of integration of cells can be improved. Additionally, since the side wall selection gates are disposed on both sidewalls of the floating gate, a voltage applied from a bit line and a common source line can be controlled and thus conventional writing/erasing errors can be prevented. Therefore, distribution of threshold voltage can be improved.
Abstract:
There is provided a simulator for CPR and defibrillator training, which may perform training and evaluation of CPR and a defibrillator so that when there is a patient in an emergency situation, effective first aid can be provided to the patient. Through the simulator for CPR and defibrillator training, CPR and the use of the defibrillator for emergency medical technicians such as a doctor, a nurse and an emergency medical technician can be systematically and repetitively trained, and a person in charge of training can identify whether or not the education is performed effectively by recording and evaluating a training situation. Also, through the simulator, the education of CPR and defibrillator training is possible so that not only the emergency medical technicians but also general people can perform emergency treatment effectively.
Abstract:
A mobile terminal including a wireless communication unit configured to access a web page, a display unit configured to display the accessed web page, a receiving unit configured to receive input voice information, and a controller configured to convert the input voice information into text information, to search the displayed web page for objects that include the converted text information, and to control the display unit to distinctively display found objects that include the converted text information from other information displayed on the web page.