公开(公告)号：US20200275636A1

公开(公告)日：2020-09-03

申请号：US16649459

申请日：2018-09-21

Applicant: Dae-Yong Kim

Inventor： Dae-Yong KIM ,  Seung-Hee SON

IPC: A01K15/02 ,  F21V33/00

Abstract: A pet exercise apparatus includes: a base module; a running module which has an exercise space formed therein in an axial direction and an inner circumferential surface or outer circumferential surface rotatably coupled to the base module; and an LED module provided in the base module or the running module to irradiate LED light to the exercise space. The pet exercise system may further includes: a rotary module which has an exercise space part formed therein as a space in which the pet may exercise and a gaze inducing part provided on an inner circumferential surface and inducing a pet's gaze so that the pet continuously moves in the exercise space part and may exercise; a support module supporting the rotary module so that the rotary module is rotatable according to the motion of the pet; a control module controlling an operation of the gaze inducing part; and a terminal including a communication part transmitting an operation control signal CI of the gaze inducing part to be transmitted to the control module.

公开(公告)号：US09640375B2

公开(公告)日：2017-05-02

申请号：US13816560

申请日：2011-08-12

Applicant: Byong Chul Yoo ,  In Hoo Kim ,  Kyung Hee Kim ,  Jun Hwa Lee ,  Kwang Gi Kim ,  Hee Jin Chang ,  Dae Yong Kim ,  Jae Hwan Oh ,  Byung Chang Kim ,  Ji Won Park ,  Sun Young Kim

Inventor： Byong Chul Yoo ,  In Hoo Kim ,  Kyung Hee Kim ,  Jun Hwa Lee ,  Kwang Gi Kim ,  Hee Jin Chang ,  Dae Yong Kim ,  Jae Hwan Oh ,  Byung Chang Kim ,  Ji Won Park ,  Sun Young Kim

IPC: G01N33/48 ,  H01J49/00 ,  G01N33/574 ,  G01N33/68 ,  G06F19/00 ,  G06G7/58 ,  G06F19/24

CPC classification number: H01J49/0036 ,  G01N33/57419 ,  G01N33/6848 ,  G06F19/24 ,  G06F19/703

Abstract: The present invention provides a method for determining low mass ions for diagnosing colorectal cancer by using a MALDI-TOF mass spectrometer to biostatistically analyze low mass ions, which are extracted from a biological sample, and a method for providing information for diagnosing colorectal cancer using same. The present inventions can provide a diagnostic method, which requires low cost and a short time for analysis, can analyze large areas, and which can provide superior and credible discriminations.

公开(公告)号：US09263098B2

公开(公告)日：2016-02-16

申请号：US14504911

申请日：2014-10-02

Applicant: Sungmin Yoo ,  Dae-Yong Kim ,  JuHwa Kim

Inventor： Sungmin Yoo ,  Dae-Yong Kim ,  JuHwa Kim

IPC: G11C5/14 ,  H02M3/158

CPC classification number: G11C5/147 ,  G11C5/148 ,  H02M3/158

Abstract: A memory controller of inventive concepts may include an active regulator configured to operate in an active mode and be inactive in a sleep mode, an active logic configured to receive a drive voltage, a power gating switch configured to connect the active regulator to the active logic after a transient state of the active mode, the transient state being an initial time period of the active mode, and a charging circuit configured to charge the active logic during the transient state.

Abstract translation: 发明概念的存储器控​​制器可以包括被配置为以活动模式操作并且在睡眠模式中不活动的有源调节器，被配置为接收驱动电压的有源逻辑，配置成将有源调节器连接到有源逻辑的电源门控开关 在激活模式的瞬态之后，所述瞬态状态是所述激活模式的初始时间段，以及充电电路，被配置为在所述瞬态状态期间对所述有源逻辑进行充电。

公开(公告)号：US20140099618A1

公开(公告)日：2014-04-10

申请号：US13967661

申请日：2013-08-15

Applicant: Seung-Jin YANG ,  Dae-Yong KIM ,  In-Bae CHANG

Inventor： Seung-Jin YANG ,  Dae-Yong KIM ,  In-Bae CHANG

IPC: G09B23/28

CPC classification number: G09B23/288

Abstract: There is provided a Cardiopulmonary Resuscitation (CPR) simulator enabling repeated defibrillation training to allow a user to practice CPR and use of a defibrillator, and the CPR simulator includes a dummy in a body shape similar to a human body shape; a first magnet installed on a upper right part of a chest of a body of the dummy; a second magnet installed on a bottom left side of the chest of the body of the dummy; a first training pad having a first metal sheet formed on one side thereof and a first electrode pad formed on the other side thereof; and a second training pad having a second metal sheet formed on one side thereof and a second electrode pad formed on the other side thereof.

Abstract translation: 提供了一种心肺复苏（CPR）模拟器，其能够进行重复除颤训练，以允许用户练习CPR并使用除颤器，并且CPR模拟器包括具有类似于人体形状的身体形状的虚拟人物; 安装在虚拟人体的胸部的右上方的第一磁体; 安装在虚拟人体的胸部左下方的第二磁体; 第一训练垫，其具有在其一侧上形成的第一金属片和在其另一侧上形成的第一电极焊盘; 以及第二训练垫，其具有形成在其一侧上的第二金属片和在其另一侧上形成的第二电极垫。

公开(公告)号：US20130316535A1

公开(公告)日：2013-11-28

申请号：US13788599

申请日：2013-03-07

Applicant: Chung-Hwan Shin ,  Sang-Bom Kang ,  Dae-Yong Kim ,  Jeong-Ik Kim ,  Chul-Sung Kim ,  Je-Hyung Ryu ,  Sang-Woo Lee ,  Hyo-Seok Choi

Inventor： Chung-Hwan Shin ,  Sang-Bom Kang ,  Dae-Yong Kim ,  Jeong-Ik Kim ,  Chul-Sung Kim ,  Je-Hyung Ryu ,  Sang-Woo Lee ,  Hyo-Seok Choi

IPC: H01L21/28

CPC classification number: H01L29/7839 ,  H01L21/26506 ,  H01L21/28 ,  H01L21/28518 ,  H01L21/28537 ,  H01L21/76814 ,  H01L23/485 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/401 ,  H01L29/665 ,  H01L29/66636 ,  H01L29/66643 ,  H01L29/78 ,  H01L29/7848 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a semiconductor device can be provided by forming an opening that exposes a surface of an elevated source/drain region. The size of the opening can be reduced and a pre-amorphization implant (PAI) can be performed into the elevated source/drain region, through the opening, to form an amorphized portion of the elevated source/drain region. A metal-silicide can be formed from a metal and the amorphized portion.

Abstract translation: 可以通过形成露出升高的源极/漏极区域的表面的开口来提供形成半导体器件的方法。 可以减小开口的尺寸，并且可以通过开口将升高的源极/漏极区域（PAI）进行预非晶化植入（PAI），以形成升高的源极/漏极区域的非晶化部分。 金属硅化物可以由金属和非晶化部分形成。

公开(公告)号：US08339851B2

公开(公告)日：2012-12-25

申请号：US13200361

申请日：2011-09-23

Applicant: Dae-Yong Kim ,  Sang-Won Hwang ,  Jun-Yong Park

Inventor： Dae-Yong Kim ,  Sang-Won Hwang ,  Jun-Yong Park

IPC: G11C11/34

CPC classification number: G11C16/16 ,  G11C16/0483 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546

Abstract: In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.

公开(公告)号：US20120171826A1

公开(公告)日：2012-07-05

申请号：US13243147

申请日：2011-09-23

Applicant: Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

Inventor： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

IPC: H01L21/8238

CPC classification number: H01L21/823807 ,  H01L21/823814

Abstract: A method of fabricating a semiconductor includes providing a substrate having a first region and a second region defined therein, forming a first gate and a first source and drain region in the first region and forming a second gate and a second source and drain region in the second region, forming an epitaxial layer in the second source and drain region, forming a first metal silicide layer in the first source and drain region, forming an interlayer dielectric layer on the first region and the second region, forming a plurality of contact holes exposing the first metal silicide layer and the epitaxial layer while penetrating the interlayer dielectric layer, forming a second metal silicide layer in the exposed epitaxial layer, and forming a plurality of contacts contacting the first and second metal silicide layers by filling the plurality of contact holes.

Abstract translation: 制造半导体的方法包括提供具有限定在其中的第一区域和第二区域的衬底，在第一区域中形成第一栅极和第一源极和漏极区域，并在第一区域中形成第二栅极和第二源极和漏极区域 在所述第二源极和漏极区域中形成外延层，在所述第一源极和漏极区域中形成第一金属硅化物层，在所述第一区域和所述第二区域上形成层间电介质层，形成多个接触孔， 第一金属硅化物层和外延层，同时穿透层间电介质层，在暴露的外延层中形成第二金属硅化物层，并且通过填充多个接触孔形成与第一和第二金属硅化物层接触的多个触点。

公开(公告)号：US08149621B2

公开(公告)日：2012-04-03

申请号：US12585725

申请日：2009-09-23

Applicant: Bo-geun Kim ,  Dae-yong Kim ,  Jun-yong Park

Inventor： Bo-geun Kim ,  Dae-yong Kim ,  Jun-yong Park

IPC: G11C11/34

CPC classification number: G11C29/12 ,  G11C16/04 ,  G11C2029/1208

Abstract: A flash memory device and a method of testing the flash memory device are provided. The flash memory device may include a memory cell array including a plurality of bit lines, a control unit configured to output estimated data and an input/output buffer unit including a plurality of page buffers. Each of the plurality of page buffers corresponds to one of the plurality of bit lines in the memory cell array and is configured to read test data programmed in at least a first page of a memory cell array, compare the read-out test data with the estimated data to determine whether the corresponding bit line is in a pass or failure state and output a test result signal. A voltage of the test result signal is maintained when test data of a second page of the memory cell array is read if the corresponding bit line in the first page is in a failure state.

Abstract translation: 提供一种闪存设备和测试闪存设备的方法。 闪存器件可以包括包括多个位线的存储单元阵列，被配置为输出估计数据的控制单元和包括多个页缓冲器的输入/输出缓冲单元。 多个页缓冲器中的每一个对应于存储单元阵列中的多个位线之一，并且被配置为读取在存储单元阵列的至少第一页中编程的测试数据，将读出的测试数据与 估计数据，以确定对应的位线是否处于通过或故障状态，并输出测试结果信号。 如果第一页中的相应位线处于故障状态，则读取存储单元阵列的第二页的测试数据时，维持测试结果信号的电压。

公开(公告)号：US08081509B2

公开(公告)日：2011-12-20

申请号：US12662571

申请日：2010-04-23

Applicant: Dae-Yong Kim ,  Sang-Won Hwang ,  Jun-Yong Park

Inventor： Dae-Yong Kim ,  Sang-Won Hwang ,  Jun-Yong Park

IPC: G11C11/34

CPC classification number: G11C16/16 ,  G11C16/0483 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546

Abstract: In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line; and the de-coupling transistor is formed in the well.

Abstract translation: 在一个实施例中，非易失性存储器件包括形成在衬底中的第一导电类型的阱以及与阱中形成的位线串联连接的第一多个存储单元晶体管。 在阱外部的衬底中形成缓冲器，并连接到位线。 至少一个去耦合晶体管被配置为从位线去耦合缓冲器; 并且在阱中形成去耦合晶体管。

公开(公告)号：US20110043141A1

公开(公告)日：2011-02-24

申请号：US12919195

申请日：2009-02-23

Applicant: Hyun-Tak Kim ,  Bong-Jun Kim ,  Sun-Jin Yun ,  Dae-Yong Kim

Inventor： Hyun-Tak Kim ,  Bong-Jun Kim ,  Sun-Jin Yun ,  Dae-Yong Kim

IPC: H05B37/02 ,  H01L21/8222 ,  H01L21/8234 ,  H03K3/011

CPC classification number: H01L27/067 ,  H01L49/003

Abstract: Provided are a MIT device self-heating preventive-circuit that can solve a self-heating problem of a MIT device and a method of manufacturing a MIT device self-heating preventive-circuit integrated device. The MIT device self-heating preventive-circuit includes a MIT device that generates an abrupt MIT at a temperature equal to or greater than a critical temperature and is connected to a current driving device to control the flow of current in the current driving device, a transistor that is connected to the MIT device to control the self-heating of the MIT device after generating the MIT in the MIT device, and a resistor connected to the MIT device and the transistor.

Abstract translation: 提供了能够解决MIT装置的自发热问题的MIT装置自发热防止电路以及制造MIT装置自发热防止电路集成装置的方法。 MIT装置自发热防止电路包括MIT装置，其在等于或大于临界温度的温度下产生突然的MIT，并连接到电流驱动装置以控制当前驱动装置中的电流流动， 晶体管，其连接到MIT装置，以在MIT装置中产生MIT之后控制MIT装置的自发热，以及连接到MIT装置和晶体管的电阻器。