公开(公告)号：US5654203A

公开(公告)日：1997-08-05

申请号：US479212

申请日：1995-06-07

申请人： Hisashi Ohtani ,  Hiroki Adachi ,  Akiharu Miyanaga ,  Toru Takayama

发明人： Hisashi Ohtani ,  Hiroki Adachi ,  Akiharu Miyanaga ,  Toru Takayama

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84

CPC分类号： H01L21/2022 ,  H01L27/1214 ,  H01L29/66757

摘要： In a method for crystallizing an amorphous silicon film by a heat treatment that is effected for a duration of about 4 hours at about 550.degree. C. using a catalyst element for accelerating the crystallization, the quantity of the catalyst element to be introduced into the amorphous silicon is precisely controlled. A resist mask 21 is formed on the surface of an amorphous silicon film 12 provided on a glass substrate 11, and an aqueous solution 14, e.g., an acetate solution, containing a catalyst element such as nickel at a concentration controlled in a range of from 10 to 200 ppm (need to be adjusted) is supplied dropwise thereto. After maintaining the state for a predetermined duration of time, the entire substrate is subjected to spin drying using a spinner 15. A thin film of crystalline silicon is finally obtained by applying heat treatment at 550.degree. C. for a duration of 4 hours.

摘要翻译： 在通过使用催化剂元素在约550℃下进行约4小时的热处理使非晶硅膜结晶的方法中，加入结晶的催化剂元素的量将被引入非晶态 硅精确控制。 在设置在玻璃基板11上的非晶硅膜12的表面上形成抗蚀剂掩模21和含有催化剂元素如镍的水溶液14，例如乙酸盐溶液，其浓度控制在 向其中滴加10〜200ppm（需要调节）。 在将状态保持预定的持续时间之后，使用旋转器15对整个基板进行旋转干燥。最后通过在550℃下进行热处理持续4小时来获得晶体硅薄膜。

公开(公告)号：US06348367B1

公开(公告)日：2002-02-19

申请号：US08861001

申请日：1997-05-21

申请人： Hisashi Ohtani ,  Hiroki Adachi ,  Akiharu Miyanaga ,  Toru Takayama

发明人： Hisashi Ohtani ,  Hiroki Adachi ,  Akiharu Miyanaga ,  Toru Takayama

IPC分类号： H01L2128

CPC分类号： H01L21/02672 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1214 ,  H01L27/1277 ,  H01L27/1292 ,  H01L29/66757

摘要： In a method for crystallizing an amorphous silicon film by a heat treatment that is effected for a duration of about 4 hours at about 550° C. using a catalyst element for accelerating the crystallization, the quantity of the catalyst element to be introduced into the amorphous silicon is precisely controlled. A resist mask 21 is formed on the surface of an amorphous silicon film 12 provided on a glass substrate 11, and an aqueous solution 14, e.g., an acetate solution, containing a catalyst element such as nickel at a concentration controlled in a range of from 10 to 200 ppm (need to be adjusted) is supplied dropwise thereto. After maintaining the state for a predetermined duration of time, the entire substrate is subjected to spin drying using a spinner 15. A thin film of crystalline silicon is finally obtained by applying heat treatment at 550° C. for a duration of 4 hours.

摘要翻译： 在通过使用催化剂元素在约550℃下进行约4小时的热处理使非晶硅膜结晶的方法中，用于加速结晶的催化剂元素的量将被引入非晶态 硅精确控制。 在设置在玻璃基板11上的非晶硅膜12的表面上形成抗蚀剂掩模21和含有催化剂元素如镍的水溶液14，例如乙酸盐溶液，其浓度控制在 向其中滴加10〜200ppm（需要调节）。 在将状态保持预定的持续时间之后，使用旋转器15对整个基板进行旋转干燥。最后通过在550℃下进行热处理4小时来获得晶体硅薄膜。

公开(公告)号：US6074901A

公开(公告)日：2000-06-13

申请号：US483063

申请日：1995-06-07

申请人： Hisashi Ohtani ,  Hiroki Adachi

发明人： Hisashi Ohtani ,  Hiroki Adachi

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/225

CPC分类号： H01L21/2022 ,  H01L29/66757

摘要： In a process for crystallizing an amorphous silicon film at a low temperature using a catalyst element, a system which automatically introduces the catalyst element into the amorphous silicon film is provided. The process steps are necessary for applying a solution containing an element which accelerates the crystallization of an amorphous silicon film are each effected in units 14 to 21. The substrate is transferred using a robot arm 12.

摘要翻译： 在使用催化剂元件在低温下使非晶硅膜结晶的方法中，提供了将催化剂元素自动引入到非晶硅膜中的系统。 施加包含加速非晶硅膜的结晶的元素的溶液的方法各自以单元14至21进行的处理步骤是必需的。使用机器人臂12转移基板。

公开(公告)号：US07759788B2

公开(公告)日：2010-07-20

申请号：US12230484

申请日：2008-08-29

申请人： Tomoyuki Aoki ,  Takuya Tsurume ,  Hiroki Adachi ,  Hisashi Ohtani

发明人： Tomoyuki Aoki ,  Takuya Tsurume ,  Hiroki Adachi ,  Hisashi Ohtani

IPC分类号： H01L23/14

CPC分类号： H01L23/49855 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/00

摘要： A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 μm. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.

摘要翻译： 不会受到来自外部的局部按压力的损害，天线和元件相互重叠的部分的不均匀性降低的高度可靠的半导体装置。 半导体器件包括芯片和天线。 该芯片包括：包括薄膜晶体管的半导体元件层; 电连接到半导体元件层的导电树脂; 和密封层。 纤维体浸渍有机树脂的密封层覆盖半导体元件层和导电性树脂，其厚度为10〜100μm。 天线具有凹部，并且通过导电树脂与半导体元件层电连接。 芯片嵌入凹陷部分内。 芯片的厚度等于凹陷部分的深度。

公开(公告)号：US20090057875A1

公开(公告)日：2009-03-05

申请号：US12230484

申请日：2008-08-29

申请人： Tomoyuki Aoki ,  Takuya Tsurume ,  Hiroki Adachi ,  Hisashi Ohtani

发明人： Tomoyuki Aoki ,  Takuya Tsurume ,  Hiroki Adachi ,  Hisashi Ohtani

IPC分类号： H01L23/14

CPC分类号： H01L23/49855 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/00

摘要： A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 μm. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.

摘要翻译： 不会受到来自外部的局部按压力的损害，天线和元件相互重叠的部分的不均匀性降低的高度可靠的半导体装置。 半导体器件包括芯片和天线。 该芯片包括：包括薄膜晶体管的半导体元件层; 电连接到半导体元件层的导电树脂; 和密封层。 纤维体浸渍有机树脂的密封层覆盖半导体元件层和导电性树脂，其厚度为10〜100μm。 天线具有凹部，并且通过导电树脂与半导体元件层电连接。 芯片嵌入凹陷部分内。 芯片的厚度等于凹陷部分的深度。

公开(公告)号：US06798023B1

公开(公告)日：2004-09-28

申请号：US09593765

申请日：2000-06-14

申请人： Hisashi Ohtani ,  Hiroki Adachi ,  Akiharu Miyanaga ,  Toru Takayama

发明人： Hisashi Ohtani ,  Hiroki Adachi ,  Akiharu Miyanaga ,  Toru Takayama

IPC分类号： H01L2976

CPC分类号： H01L27/1277 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686 ,  H01L27/1214 ,  H01L29/66757

摘要： A semiconductor device comprising a semiconductor layer having at least first and second impurity regions and a channel formation region formed on an insulating surface; a gate insulating film adjacent to the semiconductor layer; a gate electrode adjacent to the gate insulating film; a first insulating film formed over the insulating surface, the semiconductor layer, the gate insulating film and the gate electrode; a second insulating film comprising an organic resin formed on first insulating film; an electrode formed over the second insulating film and connected to the one of the first and second impurity regions; and a pixel electrode formed over the second insulating film.

摘要翻译： 一种半导体器件，包括至少具有第一和第二杂质区域的半导体层和形成在绝缘表面上的沟道形成区域; 与半导体层相邻的栅极绝缘膜; 与栅极绝缘膜相邻的栅电极; 形成在绝缘表面上的第一绝缘膜，半导体层，栅极绝缘膜和栅电极; 第二绝缘膜，包括形成在第一绝缘膜上的有机树脂; 形成在所述第二绝缘膜上并连接到所述第一和第二杂质区之一的电极; 以及形成在所述第二绝缘膜上的像素电极。

公开(公告)号：US09214532B2

公开(公告)日：2015-12-15

申请号：US11841307

申请日：2007-08-20

申请人： Shunpei Yamazaki ,  Hiroki Adachi

发明人： Shunpei Yamazaki ,  Hiroki Adachi

IPC分类号： H01L27/108 ,  H01L29/04 ,  H01L29/76 ,  H01L27/01 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L29/6675 ,  H01L27/124 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L2029/7863

摘要： The present invention relates to a semiconductor device including a circuit composed of thin film transistors having a novel GOLD (Gate-Overlapped LDD (Lightly Doped Drain)) structure. The thin film transistor comprises a first gate electrode and a second electrode being in contact with the first gate electrode and a gate insulating film. Further, the LDD is formed by using the first gate electrode as a mask, and source and drain regions are formed by using the second gate electrode as the mask. Then, the LDD overlapping with the second gate electrode is formed. This structure provides the thin film transistor with high reliability.

摘要翻译： 本发明涉及一种半导体器件，其包括由具有新颖的GOLD（栅极重叠LDD（轻掺杂漏极））结构的薄膜晶体管构成的电路。 薄膜晶体管包括与第一栅极电极和栅极绝缘膜接触的第一栅电极和第二电极。 此外，通过使用第一栅电极作为掩模来形成LDD，并且通过使用第二栅电极作为掩模形成源区和漏区。 然后，形成与第二栅电极重叠的LDD。 该结构提供了具有高可靠性的薄膜晶体管。

公开(公告)号：US5650338A

公开(公告)日：1997-07-22

申请号：US216277

申请日：1994-03-23

申请人： Shunpei Yamazaki ,  Hongyong Zhang ,  Hideki Uochi ,  Hiroki Adachi ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Hongyong Zhang ,  Hideki Uochi ,  Hiroki Adachi ,  Yasuhiko Takemura

IPC分类号： H01L21/336 ,  H01L21/84

CPC分类号： H01L27/1214 ,  H01L29/66757

摘要： In film forming of thin film semiconductors (TFTs), a gate electrode having an anodic-oxidizable material is formed on a substrate, and the surface of the gate electrode is oxidized by anodic oxidation in an electrolytic solution so that the surface of the gate electrode is coated with an insulating film. The doping is performed using the gate electrode and the anodic oxide film as a mask, to form a source and a drain region. Then, when the laminate is again dipped in an electrolytic solution, and a voltage is applied to the gate electrode so that a current curing produces in the laminate. During the current curing, a positive voltage is preferably applied to the gate electrode for N-channel TFTs and a negative voltage is preferably to the gate electrode for P-channel TFTs. After the doping, the source and the drain region is activated by laser annealing or the like, prior to the current curing.

摘要翻译： 在薄膜半导体（TFT）的成膜中，在基板上形成具有阳极氧化材料的栅电极，并且通过电解液中的阳极氧化使栅电极的表面氧化，使得栅电极的表面 涂有绝缘膜。 使用栅电极和阳极氧化膜作为掩模进行掺杂，以形成源区和漏区。 然后，当层叠体再次浸渍在电解液中时，向栅电极施加电压，使得层压体产生电流固化。 在电流固化期间，优选对N沟道TFT的栅电极施加正电压，对P沟道TFT优选施加负电压。 在掺杂之后，在目前的固化之前，源极和漏极区域被激光退火等激活。

公开(公告)号：US08507308B2

公开(公告)日：2013-08-13

申请号：US13244397

申请日：2011-09-24

申请人： Hidekazu Takahashi ,  Daiki Yamada ,  Yohei Monma ,  Takahiro Iguchi ,  Hiroki Adachi ,  Shunpei Yamazaki

发明人： Hidekazu Takahashi ,  Daiki Yamada ,  Yohei Monma ,  Takahiro Iguchi ,  Hiroki Adachi ,  Shunpei Yamazaki

IPC分类号： H01L31/18

CPC分类号： H01L27/14625 ,  H01L27/14806 ,  H01L31/075

摘要： A semiconductor device includes a plurality of semiconductor integrated circuits bonded to a structure body in which a fibrous body is impregnated with an organic resin. The plurality of semiconductor integrated circuits are provided at openings formed in the structure body and each include a photoelectric conversion element, a light-transmitting substrate which has stepped sides and in which the width of the projected section on a first surface side is smaller than that of a second surface, a semiconductor integrated circuit portion provided on the second surface of the light-transmitting substrate, and a chromatic color light-transmitting resin layer which covers the first surface and part of side surfaces of the light-transmitting substrate. The plurality of semiconductor integrated circuits include the chromatic color light-transmitting resin layers of different colors.

摘要翻译： 半导体器件包括多个半导体集成电路，该多个半导体集成电路与结构体结合，纤维体浸渍有机树脂。 多个半导体集成电路设置在形成在结构体中的开口处，并且各自包括光电转换元件，具有阶梯侧的透光基板，第一表面侧的突出部的宽度小于 设置在透光基板的第二表面上的半导体集成电路部分和覆盖透光基板的第一表面和侧表面的彩色透光树脂层。 多个半导体集成电路包括不同颜色的彩色透光树脂层。

公开(公告)号：US20090267173A1

公开(公告)日：2009-10-29

申请号：US12404376

申请日：2009-03-16

申请人： Hidekazu Takahashi ,  Daiki Yamada ,  Yohei Monma ,  Takahiro Iguchi ,  Hiroki Adachi ,  Shunpei Yamazaki

发明人： Hidekazu Takahashi ,  Daiki Yamada ,  Yohei Monma ,  Takahiro Iguchi ,  Hiroki Adachi ,  Shunpei Yamazaki

IPC分类号： H01L31/02 ,  H01L21/50

CPC分类号： H01L27/14625 ,  H01L27/14806 ,  H01L31/075

摘要： A semiconductor device includes a plurality of semiconductor integrated circuits bonded to a structure body in which a fibrous body is impregnated with an organic resin. The plurality of semiconductor integrated circuits are provided at openings formed in the structure body and each include a photoelectric conversion element, a light-transmitting substrate which has stepped sides and in which the width of the projected section on a first surface side is smaller than that of a second surface, a semiconductor integrated circuit portion provided on the second surface of the light-transmitting substrate, and a chromatic color light-transmitting resin layer which covers the first surface and part of side surfaces of the light-transmitting substrate. The plurality of semiconductor integrated circuits include the chromatic color light-transmitting resin layers of different colors.

摘要翻译： 半导体器件包括多个半导体集成电路，该多个半导体集成电路与结构体结合，纤维体浸渍有机树脂。 多个半导体集成电路设置在形成在结构体中的开口处，并且各自包括光电转换元件，具有阶梯侧的透光基板，第一表面侧的突出部的宽度小于 设置在透光基板的第二表面上的半导体集成电路部分和覆盖透光基板的第一表面和侧表面的彩色透光树脂层。 多个半导体集成电路包括不同颜色的彩色透光树脂层。