Reducing distortion in an analog-to-digital converter

    公开(公告)号:US09748963B2

    公开(公告)日:2017-08-29

    申请号:US15188272

    申请日:2016-06-21

    CPC classification number: H03M1/002 H03M1/0626 H03M1/1009 H03M1/124 H03M1/60

    Abstract: In one embodiment, an apparatus includes: a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive a first portion of a differential analog signal and convert the first portion of the differential analog signal into a first digital value; a second VCO ADC unit to receive a second portion of the differential analog signal and convert the second portion of the differential analog signal into a second digital value; a combiner to form a combined digital signal from the first and second digital values; a decimation circuit to receive the combined digital signal and filter the combined digital signal into a filtered combined digital signal; and a cancellation circuit to receive the filtered combined digital signal and generate a distortion cancelled digital signal, based at least in part on a coefficient value.

    Reducing Distortion In An Analog-To-Digital Converter
    14.
    发明申请
    Reducing Distortion In An Analog-To-Digital Converter 有权
    减少模数转换器中的失真

    公开(公告)号:US20160380643A1

    公开(公告)日:2016-12-29

    申请号:US15188272

    申请日:2016-06-21

    CPC classification number: H03M1/002 H03M1/0626 H03M1/1009 H03M1/124 H03M1/60

    Abstract: In one embodiment, an apparatus includes: a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive a first portion of a differential analog signal and convert the first portion of the differential analog signal into a first digital value; a second VCO ADC unit to receive a second portion of the differential analog signal and convert the second portion of the differential analog signal into a second digital value; a combiner to form a combined digital signal from the first and second digital values; a decimation circuit to receive the combined digital signal and filter the combined digital signal into a filtered combined digital signal; and a cancellation circuit to receive the filtered combined digital signal and generate a distortion cancelled digital signal, based at least in part on a coefficient value.

    Abstract translation: 在一个实施例中,一种装置包括:第一压控振荡器(VCO)模数转换器(ADC)单元,用于接收差分模拟信号的第一部分,并将差分模拟信号的第一部分转换成第一数字 值; 第二VCO ADC单元,用于接收差分模拟信号的第二部分,并将差分模拟信号的第二部分转换为第二数字值; 组合器,用于从第一和第二数字值形成组合的数字信号; 一个抽取电路,用于接收组合的数字信号,并将组合的数字信号滤波成经滤波的组合数字信号; 以及抵消电路,用于至少部分地基于系数值接收经滤波的组合数字信号并产生失真消除的数字信号。

    Multi-tuner using interpolative dividers
    15.
    发明授权
    Multi-tuner using interpolative dividers 有权
    多调谐器使用内插分频器

    公开(公告)号:US09106867B2

    公开(公告)日:2015-08-11

    申请号:US14505701

    申请日:2014-10-03

    Abstract: An apparatus includes a splitter to receive a radio frequency (RF) signal and to provide the RF signal to multiple channels of a tuner. Each channel may include an amplifier to amplify the RF signal, a mixer to downconvert the amplified RF signal to a second frequency signal using a local oscillator (LO) signal, where each of the channels is configured to receive a different LO signal, a filter to filter the downconverted second frequency signal, and a digitizer to digitize the downconverted second frequency signal. A clock generation circuit has multiple interpolative dividers and a frequency synthesizer to generate a reference clock signal. Each of the interpolative dividers is configured to receive the reference clock signal, generate a corresponding LO signal, and provide the corresponding LO signal to the mixer of at least one of the channels.

    Abstract translation: 一种装置包括用于接收射频(RF)信号并将RF信号提供给调谐器的多个信道的分离器。 每个通道可以包括用于放大RF信号的放大器,使用本地振荡器(LO)信号将放大的RF信号下变频到第二频率信号的混频器,其中每个信道被配置为接收不同的LO信号,滤波器 对下变频的第二频率信号进行滤波,以及数字转换器,对下变频的第二频率信号进行数字化。 时钟发生电路具有多个内插分频器和频率合成器,以产生参考时钟信号。 每个内插分频器被配置为接收参考时钟信号,产生相应的LO信号,并将相应的LO信号提供给至少一个信道的混频器。

    LOW-COST RECEIVER USING INTEGRATED INDUCTORS
    16.
    发明申请
    LOW-COST RECEIVER USING INTEGRATED INDUCTORS 有权
    使用集成电感的低成本接收器

    公开(公告)号:US20150147991A1

    公开(公告)日:2015-05-28

    申请号:US14612232

    申请日:2015-02-02

    Abstract: A receiver includes a first amplifier having an input for receiving an RF signal, and an output for providing an amplified RF signal, a switch section that selectively switches the amplified RF signal onto a selected one of a plurality of nodes, and a filter section comprising a plurality of filters coupled to respective ones of the plurality of nodes. A first filter of the plurality of filters comprises a first variable capacitor coupled in parallel with an inductance leg between a corresponding one of the plurality of nodes and a power supply voltage terminal. The first variable capacitor has a capacitance that varies in response to a tuning signal. The inductance leg includes a first inductor in series with an effective resistance, wherein the effective resistance has a value related to an upper cutoff frequency to be tuned by the first filter.

    Abstract translation: 接收机包括具有用于接收RF信号的输入端的第一放大器和用于提供放大的RF信号的输出端,用于选择性地将放大的RF信号切换到多个节点中选定的一个节点的开关部分,以及包括 耦合到所述多个节点中的相应节点的多个滤波器。 多个滤波器的第一滤波器包括与多个节点中的相应一个节点之间的电感腿和电源电压端子并联耦合的第一可变电容器。 第一可变电容器具有响应于调谐信号而变化的电容。 电感腿包括与有效电阻串联的第一电感器,其中有效电阻具有与要由第一滤波器调谐的上截止频率相关的值。

    AMPLIFIER FOR TELEVISION TUNER CHIP AND METHOD THEREFOR
    17.
    发明申请
    AMPLIFIER FOR TELEVISION TUNER CHIP AND METHOD THEREFOR 有权
    电视调谐器芯片的放大器及其方法

    公开(公告)号:US20140361838A1

    公开(公告)日:2014-12-11

    申请号:US13910392

    申请日:2013-06-05

    Abstract: An amplifier includes a negative gain amplifier, a load element, and a transconductance device. The negative gain amplifier has an input and an output. The load element has a first terminal coupled to a power supply voltage terminal, and a second terminal. The transconductance device has a first current electrode coupled to the second terminal of the load element, a control electrode coupled to the output of the negative gain amplifier, and a second current electrode coupled to the input of the negative gain amplifier.

    Abstract translation: 放大器包括负增益放大器,负载元件和跨导器件。 负增益放大器具有输入和输出。 负载元件具有耦合到电源电压端子的第一端子和第二端子。 跨导器件具有耦合到负载元件的第二端子的第一电流电极,耦合到负增益放大器的输出的控制电极和耦合到负增益放大器的输入的第二电流电极。

    Integrated receivers and integrated circuit having integrated inductors
    18.
    发明授权
    Integrated receivers and integrated circuit having integrated inductors 有权
    具有集成电感器的集成接收器和集成电路

    公开(公告)号:US08706069B2

    公开(公告)日:2014-04-22

    申请号:US13923824

    申请日:2013-06-21

    Abstract: A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.

    Abstract translation: 接收机包括输入部分,多个RF部分,输出电路和控制器。 输入部分接收和放大射频(RF)输入信号以提供放大的RF信号,并具有增益输入。 多个RF部分各自具有用于接收放大的RF信号的输入端和用于提供中频信号的输出端。 输出电路响应于多个RF部分中的至少一个的输出而提供中频输出信号。 控制器具有耦合到输入部分的增益输入的输出。

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