Estimating voltage on speaker terminals driven by a class-D amplifier

    公开(公告)号:US10110182B2

    公开(公告)日:2018-10-23

    申请号:US15382159

    申请日:2016-12-16

    Abstract: A system includes an audio amplifier, a duty cycle detector, a channel equalizer, and a sample-and-hold circuit. The audio amplifier is configured to amplify an analog audio signal to produce an amplified audio signal. The duty cycle detector is configured to generate a saturation detect signal at a first state upon detection that the amplified audio signal produced by the audio amplifier is clipped. The channel equalizer is configured to generate an initial estimate of a speaker terminal voltage. The sample-and-hold circuit is configured to sample and hold the initial estimate of the speaker terminal voltage as a final estimate of the speaker voltage when the saturation detect signal is in the first state.

    Pulse width modulated amplifier
    15.
    发明授权

    公开(公告)号:US11923813B2

    公开(公告)日:2024-03-05

    申请号:US17503405

    申请日:2021-10-18

    CPC classification number: H03F3/2173 H03K4/90 H03F2200/03 H03F2200/351

    Abstract: A pulse width modulated (PWM) amplifier includes a synchronization logic circuit having a first input configured to receive a bridge control signal and having a second input configured to receive a clock signal. The synchronization logic circuit is configured to provide a slope switch signal and a reference switch signal. The PWM amplifier includes a ramp generator having a first input configured to receive a first voltage supply and having a second input configured to receive a second voltage supply and having a third input configured to receive the reference switch signal and having a fourth input configured to receive the slope switch signal. The ramp generator is configured to provide a ramp signal having a first slope responsive to the slope switch signal in a first state and having a second slope responsive to the slope switch signal in a second state and to provide the clock signal.

    Pulse width modulated amplifier
    17.
    发明授权

    公开(公告)号:US11177785B1

    公开(公告)日:2021-11-16

    申请号:US17024994

    申请日:2020-09-18

    Abstract: A pulse width modulated (PWM) amplifier includes a synchronization logic circuit having a first input configured to receive a bridge control signal and having a second input configured to receive a clock signal. The synchronization logic circuit is configured to provide a slope switch signal and a reference switch signal. The PWM amplifier includes a ramp generator having a first input configured to receive a first voltage supply and having a second input configured to receive a second voltage supply and having a third input configured to receive the reference switch signal and having a fourth input configured to receive the slope switch signal. The ramp generator is configured to provide a ramp signal having a first slope responsive to the slope switch signal in a first state and having a second slope responsive to the slope switch signal in a second state and to provide the clock signal.

    Analog based speaker thermal protection in class-D amplifiers

    公开(公告)号:US10903802B2

    公开(公告)日:2021-01-26

    申请号:US16553369

    申请日:2019-08-28

    Abstract: A circuit comprises a sensing resistor with a resistance Rs, a first amplifier circuit with a first gain factor G, a second amplifier circuit with a second gain factor (1/A), a third amplifier circuit, a current mirror, a buffer, and a peak voltage detector. The first amplifier circuit is coupled to the sensing resistor at a first node and a second node and to the second amplifier circuit, which is further coupled to the current mirror. The buffer is coupled to the current mirror and to the third amplifier circuit, which is further coupled to the peak voltage detector and configured to receive a voltage across a load and a voltage on a ground node. In some implementations, the load is a speaker. In some implementations, a filter is coupled between the first and the second amplifier circuits.

    Power converter controller
    19.
    发明授权

    公开(公告)号:US10291118B2

    公开(公告)日:2019-05-14

    申请号:US15847383

    申请日:2017-12-19

    Abstract: A power supply, comprising a controller comprising a first switch coupled between a first node and a second node, a first resistor coupled between the second node and a third node, a second resistor coupled between the first node and a fourth node, a capacitor coupled between the fourth node and a fifth node, an amplifier coupled at a first input to the fourth node, at a second input to the third node, and at an output to the fifth node, and a comparator coupled at a first input to the fifth node and at a second input to the third node.

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