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    METHODS AND APPARATUS TO REDUCE LEAKAGE CURRENT
    11.
    发明申请
    METHODS AND APPARATUS TO REDUCE LEAKAGE CURRENT 审中-公开

    公开(公告)号：US20200076419A1

    公开(公告)日：2020-03-05

    申请号：US16360914

    申请日：2019-03-21

    Applicant: Texas Instruments Incorporated

    Inventor： Mayank Garg

    IPC: H03K17/16 ,  H01L27/06 ,  H01L27/02 ,  H03K17/082

    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed that provide an apparatus comprising: a first transistor including a first gate, a first current terminal, and a second current terminal; a second transistor including a second gate, a third current terminal, and a fourth current terminal; the first current terminal coupled to the third current terminal; the first gate coupled to the second gate and the second current terminal; a third transistor including a third gate, a fifth current terminal, and a sixth current terminal, the fifth current terminal coupled to the second current terminal, third gate coupled to a voltage reference node; and a fourth transistor including a fourth gate, a seventh current terminal and an eighth current terminal, the seventh current terminal coupled to the sixth current terminal, the fourth gate coupled to the seventh current terminal and the eighth current terminal coupled to the fourth current terminal.

    REJECTION OF END-OF-PACKET DRIBBLE IN HIGH SPEED UNIVERSAL SERIAL BUS REPEATERS
    12.
    发明公开
    REJECTION OF END-OF-PACKET DRIBBLE IN HIGH SPEED UNIVERSAL SERIAL BUS REPEATERS 审中-公开

    公开(公告)号：US20240250715A1

    公开(公告)日：2024-07-25

    申请号：US18625353

    申请日：2024-04-03

    Applicant: Texas Instruments Incorporated

    Inventor： Srijan Rastogi ,  Mayank Garg ,  Anant Shankar Kamath

    IPC: H04B3/36 ,  H03F3/45

    CPC classification number: H04B3/36 ,  H03F3/45179

    Abstract: Universal Serial Bus (USB) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. In a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. The receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. End-of-packet (EOP) dribble in USB communications in the HS mode is reduced by the offset at the hysteresis stage.

    Methods, apparatus, and systems to facilitate multi-channel isolation
    13.
    发明授权
    Methods, apparatus, and systems to facilitate multi-channel isolation 有权

    公开(公告)号：US11669069B2

    公开(公告)日：2023-06-06

    申请号：US17339213

    申请日：2021-06-04

    Applicant: Texas Instruments Incorporated

    Inventor： Matthew David Romig ,  Mayank Garg

    IPC: G05B19/414

    CPC classification number: G05B19/4144 ,  G05B2219/34236

    Abstract: Methods, systems, and apparatus to facilitate multi-channel isolation is disclosed. An example apparatus includes a multiplexer including a first input terminal, a second input terminal, and an output terminal; a modulator including an input terminal and an output terminal, the input terminal of the modulator coupled to the output terminal of the multiplexer; an isolation capacitor including a first terminal and a second terminal, the first terminal of the isolation capacitor coupled to the output terminal of the modulator; a first receiver die coupled to the second terminal of the isolation capacitor; and a second receiver die coupled to the second terminal of the isolation capacitor.

    Detection of a power state change in a serial bus repeater
    14.
    发明授权
    Detection of a power state change in a serial bus repeater 有权

    公开(公告)号：US11630797B2

    公开(公告)日：2023-04-18

    申请号：US17341089

    申请日：2021-06-07

    Applicant: Texas Instruments Incorporated

    Inventor： Anant Shankar Kamath ,  Rakesh Hariharan ,  Vivekkumar Ramanlal Vadodariya ,  Soumi Paul ,  Mayank Garg

    IPC: G06F13/42 ,  G06F1/3215 ,  G06F13/38

    Abstract: A bus repeater includes first and second bus ports, a first termination resistor network coupled to the first bus port, a second termination resistor network coupled to the second bus port, and a power state change detection circuit coupled to the second bus port. The power state change detection circuit is configured to detect a power state change initiated by a device coupled to the first bus port. The detection of the power state change includes a determination that a voltage on the second bus port exceeds a threshold. Responsive to detection of the power state change, the power state change detection circuit is configured cause a change in a configuration of at least one of the first or second termination resistor networks.

    Rejection of end-of-packet dribble in high speed universal serial bus repeaters
    15.
    发明授权
    Rejection of end-of-packet dribble in high speed universal serial bus repeaters 有权

    公开(公告)号：US11563462B1

    公开(公告)日：2023-01-24

    申请号：US17382499

    申请日：2021-07-22

    Applicant: Texas Instruments Incorporated

    Inventor： Srijan Rastogi ,  Mayank Garg ,  Anant Shankar Kamath

    IPC: H04B3/36 ,  H03F3/45

    Abstract: Universal Serial Bus (USB) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. In a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. The receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. End-of-packet (EOP) dribble in USB communications in the HS mode is reduced by the offset at the hysteresis stage.

    Circuits and methods for driving eccentric rotating mass motors
    17.
    发明授权
    Circuits and methods for driving eccentric rotating mass motors 有权
    用于驱动偏心旋转质量马达的电路和方法

    公开(公告)号：US09520822B2

    公开(公告)日：2016-12-13

    申请号：US13871191

    申请日：2013-04-26

    Applicant: Texas Instruments Incorporated

    Inventor： David Hernandez ,  Mayank Garg ,  David J. Baldwin ,  Brandon James Beckham

    IPC: H02P7/29 ,  H02P25/02 ,  H02P6/18 ,  G06F3/00

    CPC classification number: H02P25/032 ,  H02P6/182

    Abstract: Circuits and methods for driving ERM motors are disclosed herein. An embodiment of the circuit includes an input, wherein an input signal is receivable at the input and a back EMF signal. The circuit operates in a closed loop mode when the back EMF signal is less than a lower threshold value and the difference between the value of the input signal and the back EMF signal indicates that the velocity of the motor needs to increase. The circuit operates in an open loop mode when the back EMF signal is greater than a high threshold value and the difference between the value of the input signal and the back EMF signal indicates that the velocity of the motor needs to increase.

    Abstract translation: 本文公开了用于驱动ERM电动机的电路和方法。 电路的实施例包括输入，其中输入信号可在输入端接收，反馈EMF信号。 当反电动势信号小于下限阈值时，电路工作在闭环模式，而输入信号与反电动势信号之间的差异表示电动机的速度需要增加。 当反电动势信号大于高阈值时，电路工作在开环模式，输入信号和反电动势信号之间的差值表示电动机的速度需要增加。

    METHOD AND APPARATUS TO DRIVE A LINEAR RESONANT ACTUATOR AT ITS RESONANT FREQUENCY
    18.
    发明申请
    METHOD AND APPARATUS TO DRIVE A LINEAR RESONANT ACTUATOR AT ITS RESONANT FREQUENCY 审中-公开
    在谐振频率下驱动线性谐振致动器的方法和装置

    公开(公告)号：US20150280621A1

    公开(公告)日：2015-10-01

    申请号：US14733384

    申请日：2015-06-08

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Mayank Garg ,  David Hernandez ,  Brandon J. Beckham ,  David J. Baldwin ,  Brett E. Forejt

    IPC: H02P6/00 ,  G06F3/01 ,  G06F3/041 ,  H02P6/18

    CPC classification number: H02P6/006 ,  G06F3/016 ,  G06F3/0416 ,  H02P6/182 ,  H02P7/00 ,  H02P7/025 ,  H02P25/02 ,  H02P25/032

    Abstract: A method for driving a Linear Resonant Actuator (LRA) is provided. During a first off interval, the back-emf of the LRA is measured. During a first off interval, a timer is started when the back-emf reaches a predetermined threshold, and after a predetermined delay has lapsed following the back-emf reaching the predetermined threshold during the first off interval, the LRA is driven over a drive interval having a length and drive strength. A second off interval is entered following the drive interval, and during the second off interval, the back-emf of the LRA is measured. During the second off interval, the timer is stopped when the back-emf reaches the predetermined threshold. The value from the timer that corresponds to the duration between the back-emf reaching the predetermined threshold during the first off interval and the back-emf reaching the predetermined threshold during the second off interval determines the length.

    Abstract translation: 提供了一种用于驱动线性谐振致动器（LRA）的方法。 在第一个关闭间隔期间，测量LRA的反电动势。 在第一关闭间隔期间，当反电动势达到预定阈值时，启动定时器，并且在第一关闭间隔期间在反电动势达到预定阈值之后经过预定延迟之后，LRA在驱动间隔 具有长度和驱动力。 在驱动间隔之后输入第二个关闭间隔，并且在第二个关闭间隔期间，测量LRA的反电动势。 在第二关闭间隔期间，当反电动势达到预定阈值时，定时器停止。 对应于在第一关闭间隔期间达到预定阈值的反电动势之间的持续时间的定时器的值和在第二关闭间隔期间达到预定阈值的反电动势确定长度。

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