Abstract:
Disclosed examples include multiple output DC to DC converters with a buck converter including a half bridge switching circuit and transformer primary winding to provide a first output voltage signal, as well as a boost converter to provide an isolated second output voltage signal. The boost converter includes a transformer secondary winding magnetically coupled with the primary winding to provide a boost converter inductor, a switching circuit, an output diode providing the second output voltage signal, and a PWM controller that synchronizes the boost converter switching with the low side switch of the buck converter based on a sensed voltage of the transformer secondary winding.
Abstract:
An integrated circuit (IC) package comprises a semiconductor die, a leadframe comprising a plurality of leads coupled to bond pads on the semiconductor die, and an electrically conductive member electrically coupled to the leadframe. A magnetic mold compound encapsulates the electrically conductive member to form an inductor. A non-magnetic mold compound encapsulates the semiconductor die, the leadframe, and the magnetic mold compound.
Abstract:
In at least some embodiments, a system comprises a frequency generator configured to generate a second clock signal having a second frequency using a first clock signal having a first frequency. The second frequency is offset from the first frequency and each of a plurality of harmonic frequencies of the second frequency is offset from a harmonic frequency of the first frequency. The system also includes a power converter configured to produce a power signal that at least partially corresponds to the second frequency. The system further comprises an analog-to-digital converter (ADC) configured to sample and convert analog voltages at the first frequency. The ADC is powered by the power signal.
Abstract:
A method includes forming a first magnetic material on a first surface of a conductive loop, forming a second magnetic material on a second surface of the conductive loop opposite the first surface to form an inductor, attaching a semiconductor die to a leadframe, and attaching the inductor to the leadframe with solder balls. The semiconductor die is between the inductor and the leadframe. The conductive loop: spans parallel to the leadframe; or is between the first magnetic material and the second magnetic material.
Abstract:
In an integrated circuit (IC), a semiconductor substrate has a first side and an opposite second side. The second side has a trench. Circuitry is on the first side. An inductive structure is within the trench. The inductive structure is connected to the circuitry through vias in the semiconductor substrate. The semiconductor substrate is mounted on a package substrate. At least a portion of the inductive structure contacts the package substrate. The circuitry is coupled to the inductive structure through wires to the package substrate.
Abstract:
A transducer has an input and produces a mechanical output, wherein the magnitude of the mechanical output of the transducer is dependent on the frequency and magnitude of current at the input. A driver for the transducer includes a device having a transfer function associated with the device, the device having a device input and a device output, the device output being connectable to the input of the transducer and the device input being connectable to a power source. The device attenuates the current output at a frequency that causes a peak in the magnitude of the mechanical output of the transducer.
Abstract:
A semiconductor package is provided that has a transformer formed within a multilayer dielectric laminate substrate. The transformer has a first inductor coil formed in one or more dielectric laminate layers of the substrate, a second inductor coil formed in one or more dielectric laminate layers of the substrate, and an isolation barrier comprising two or more dielectric laminate layers of the multilayer substrate positioned between the first inductor coil and the second inductor coil. The transformer may be mounted on a lead frame along with one or more integrated circuits and molded into a packaged isolation device.
Abstract:
For isolation barrier with magnetics, an apparatus includes an isolation laminate including a dielectric core having a first surface and a second surface opposed to the first surface; at least one conductive layer configured as a first transformer coil overlying the first surface; a first dielectric layer surrounding the at least one conductive layer; a first magnetic layer overlying the at least one conductive layer; at least one additional conductive layer configured as a second transformer coil overlying the second surface; a second dielectric layer surrounding the at least one additional conductive layer; and a second magnetic layer overlying the at least one additional conductive layer. Methods for forming the isolation barriers and additional apparatus arrangements are also described.
Abstract:
Disclosed examples include isolated dual active bridge (DAB) DC to DC converters with first and second bridge circuits, a transformer with a sense coil, and a secondary side control circuit to provide secondary side switching control signals to regulate an output voltage or current signal by controlling a phase shift angle between switching transitions of the secondary side switching control signals and switching transitions of a secondary side clock signal, where the secondary side control circuit includes a clock recovery circuit to synchronize the secondary side clock signal to transitions in a sense coil voltage signal of the sense coil.
Abstract:
Disclosed examples include isolated dual active bridge (DAB) DC to DC converters with first and second bridge circuits, a transformer with a sense coil, and a secondary side control circuit to provide secondary side switching control signals to regulate an output voltage or current signal by controlling a phase shift angle between switching transitions of the secondary side switching control signals and switching transitions of a secondary side clock signal, where the secondary side control circuit includes a clock recovery circuit to synchronize the secondary side clock signal to transitions in a sense coil voltage signal of the sense coil.