公开(公告)号：US20240146323A1

公开(公告)日：2024-05-02

申请号：US17976369

申请日：2022-10-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Christy Leigh She ,  Joonsung Park ,  Krishnasawamy Nagaraj ,  Srinivasa Chakravarthy

IPC: H03M1/08

CPC classification number: H03M1/08

Abstract: Methods for operating two or more analog-to-digital converters (ADCs) are presented herein. The method may be implemented in an integrated circuit. The integrated circuit may include a first ADC and a second ADC disposed on a single semiconductor die. The integrated circuit may also include logic circuitry operably coupled to the first and second ADCs. For a digital value obtained by conversion, by the first ADC, of a first analog signal sampled by the first ADC during a period of time overlapping with another period of time during which a second analog signal is being converted by the second ADC, the logic circuitry may be configured to cause the digital value to be marked as noisy.

公开(公告)号：US11942962B2

公开(公告)日：2024-03-26

申请号：US17691606

申请日：2022-03-10

Applicant: Texas Instruments Incorporated

Inventor： Anand Kumar G ,  Srinivasa Chakravarthy

IPC: H03M1/12 ,  H03M1/00 ,  G06F3/06 ,  G06F13/00 ,  G06F13/28

CPC classification number: H03M1/12 ,  H03M1/00 ,  G06F3/0604 ,  G06F3/0655 ,  G06F3/0679 ,  G06F13/00 ,  G06F13/28 ,  G06F2213/28

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed. An example apparatus includes interface circuitry to receive an analog signal. The example apparatus also includes sequencer circuitry to: determine whether the apparatus is to operate in a single transfer state or a multiple transfer state; access a configuration from a control register in a plurality of control registers; initiate a conversion of the analog signal to a digital value based on the configuration; and write the digital value to a result register in a plurality of result registers based on the determination.

公开(公告)号：US20230129042A1

公开(公告)日：2023-04-27

申请号：US17691606

申请日：2022-03-10

Applicant: Texas Instruments Incorporated

Inventor： Anand Kumar G ,  Srinivasa Chakravarthy

IPC: G06F3/06 ,  G06F13/28

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed. An example apparatus includes interface circuitry to receive an analog signal. The example apparatus also includes sequencer circuitry to: determine whether the apparatus is to operate in a single transfer state or a multiple transfer state; access a configuration from a control register in a plurality of control registers; initiate a conversion of the analog signal to a digital value based on the configuration; and write the digital value to a result register in a plurality of result registers based on the determination.

公开(公告)号：US20220416771A1

公开(公告)日：2022-12-29

申请号：US17849417

申请日：2022-06-24

Applicant: Texas Instruments Incorporated

Inventor： Srinivasa Chakravarthy ,  Prasanth Viswanathan Pillai ,  Mohammed Arif ,  Bhargov Bora

IPC: H03K5/00 ,  H03K21/02 ,  G06F1/06

Abstract: An example apparatus includes multiplexer circuitry configured to couple a communication module to at least one of a data bus input or a test signal; and embedded pattern generator (EPG) circuitry coupled to the multiplexer circuitry, the EPG circuitry including: clock divider circuitry including a plurality of clock outputs, the clock divider circuitry configured to be coupled to an output of a clock, the plurality of clock outputs configured to be of a frequency equal to a division of a frequency of the output of the clock; a multiplexer including a multiplexer output, the multiplexer configured to couple one of the plurality of clock outputs to the multiplexer output; and signal generator circuitry including an input clock, an EPG input, and a plurality of data outputs, the input clock coupled to the multiplexer output, the signal generator circuitry configured to generate a data stream.

公开(公告)号：US11499847B2

公开(公告)日：2022-11-15

申请号：US17355248

申请日：2021-06-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Richard Mark Poley ,  Srinivasa Chakravarthy

IPC: G01C9/00 ,  G01D5/245 ,  H02K11/21 ,  H03M1/12 ,  H03M1/66 ,  H03M1/22 ,  G01D5/347 ,  G01D5/02

Abstract: In an example, a circuit includes a first comparator, a second comparator, a pulse counter, a processor, a first ADC, and a second ADC. The first comparator has a first input coupled to a first node, a second input, and an output. The second comparator has a first input coupled to a second node, a second input, and an output. A first DAC is coupled to the second input of the first comparator. A second DAC is coupled to the second input of the second comparator. The pulse counter has a first input coupled to the output of the first comparator and a second input coupled to the output of the second comparator. The first ADC has an input coupled to the first node and an output coupled to the processor. The second ADC has an input coupled to the second node and an output coupled to the processor.