-
公开(公告)号:US20250107131A1
公开(公告)日:2025-03-27
申请号:US18472329
申请日:2023-09-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Sandeep R. Bahl , Ujwal Radhakrishna , Chang Soo Suh
IPC: H01L29/778 , H01L29/08 , H01L29/20 , H01L29/66
Abstract: The present disclosure generally relates to a conductive layer in a gate structure of a semiconductor device. The conductive layer may be a silicon layer. An example is a semiconductor device. The semiconductor device includes a channel layer, a barrier layer, a gate layer, and a silicon layer. The channel layer is over a semiconductor substrate. The barrier layer is over the channel layer. The gate layer is over the barrier layer. The silicon layer is over and contacts the gate layer.
-
公开(公告)号:US20240405078A1
公开(公告)日:2024-12-05
申请号:US18326698
申请日:2023-05-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Ujwal Radhakrishna , Yoganand Saripalli , Johan Strydom , Zhikai Tang , Dong Seup Lee
IPC: H01L29/20 , H01L29/423 , H01L29/66 , H01L29/778
Abstract: The present disclosure generally relates to integrated devices with a conductive barrier structure. In an example, a semiconductor device includes a substrate, a conductive barrier structure, a channel layer, a barrier layer, a gate, and a conductive structure. The substrate is of a first semiconductor material. The conductive barrier structure is on the substrate. The channel layer is of a second semiconductor material and is on the conductive barrier structure. The barrier layer is on the channel layer, and the channel layer is between the barrier layer and the conductive barrier structure. The gate is over the barrier layer opposing the channel layer. The conductive structure is electrically coupled between the conductive barrier structure, the channel layer, and the barrier layer.
-
公开(公告)号:US11996254B2
公开(公告)日:2024-05-28
申请号:US18346298
申请日:2023-07-03
Applicant: Texas Instruments Incorporated
Inventor: Yogesh K. Ramadass , Ujwal Radhakrishna , Vinod Kuniganahalli Rai
IPC: H01H85/048 , H01H85/00 , H01H85/02 , H02H9/04
CPC classification number: H01H85/048 , H01H85/0052 , H01H85/0241 , H02H9/042
Abstract: A method comprises: forming a first metallization layer on a semiconductor die, the first metallization layer including a metal fuse; and forming a second metallization layer on the first metallization layer, in which the second metallization layer includes a thermal conductor spaced from the metal fuse, and the first metallization layer is between the second metallization layer and the semiconductor die.
-
公开(公告)号:US20240088647A1
公开(公告)日:2024-03-14
申请号:US18512134
申请日:2023-11-17
Applicant: Texas Instruments Incorporated
Inventor: Yogesh Kumar Ramadass , Ujwal Radhakrishna , Jeffrey Morroni
IPC: H02H7/20 , H01L23/525 , H03K17/687
CPC classification number: H02H7/20 , H01L23/5256 , H03K17/6871
Abstract: In one example, an apparatus comprises: a first switch and a second switch coupled between a fuse terminal and a ground terminal, the first switch having a first switch control terminal, the second switch having a second switch control terminal; and a driver circuit having a control input, a first control output, and a second control output, the control input coupled to the fuse terminal, the first control output coupled to the first switch control terminal, and the second control output coupled to the second switch control terminal.
-
公开(公告)号:US20240047387A1
公开(公告)日:2024-02-08
申请号:US18490866
申请日:2023-10-20
Applicant: Texas Instruments Incorporated
Inventor: Alexei Sadovnikov , Sheldon Douglas Haynie , Ujwal Radhakrishna
CPC classification number: H01L23/647 , H01L29/401 , H01L29/404 , H01L29/407 , H01L29/66681 , H01L29/7816 , H01L29/66659 , H01L29/7835 , H01L2223/6672
Abstract: A microelectronic device includes a doped region of semiconductor material having a first region and an opposite second region. The microelectronic device is configured to provide a first operational potential at the first region and to provide a second operational potential at the second region. The microelectronic device includes field plate segments in trenches extending into the doped region. Each field plate segment is separated from the semiconductor material by a trench liner of dielectric material. The microelectronic device further includes circuitry electrically connected to each of the field plate segments. The circuitry is configured to apply bias potentials to the field plate segments. The bias potentials are monotonic with respect to distances of the field plate segments from the first region of the doped region.
-
公开(公告)号:US20230343539A1
公开(公告)日:2023-10-26
申请号:US18346298
申请日:2023-07-03
Applicant: Texas Instruments Incorporated
Inventor: Yogesh K. Ramadass , Ujwal Radhakrishna , Vinod Kuniganahalli Rai
IPC: H01H85/02 , H01H85/00 , H02H9/04 , H01H85/048
CPC classification number: H01H85/048 , H01H85/0052 , H01H85/0241 , H02H9/042
Abstract: A method comprises: forming a first metallization layer on a semiconductor die, the first metallization layer including a metal fuse; and forming a second metallization layer on the first metallization layer, in which the second metallization layer includes a thermal conductor spaced from the metal fuse, and the first metallization layer is between the second metallization layer and the semiconductor die.
-
公开(公告)号:US20230099861A1
公开(公告)日:2023-03-30
申请号:US17490157
申请日:2021-09-30
Applicant: Texas Instruments Incorporated
Inventor: Yogesh K. Ramadass , Ujwal Radhakrishna , Vinod Kuniganahalli Rai
IPC: H01H85/048 , H01H85/00 , H01H85/02 , H02H9/04
Abstract: An electronic device includes an input, an output, a metal fuse, a resistor, a heat control transistor, and a heat controller. The metal fuse is coupled between the input and the output. The resistor is coupled between the metal fuse and the heat control transistor. The heat control transistor is coupled between the resistor and a reference terminal of the electronic device, and the heat controller is configured to control a heater current of the heat control transistor.
-
公开(公告)号:US20220367388A1
公开(公告)日:2022-11-17
申请号:US17318556
申请日:2021-05-12
Applicant: Texas Instruments Incorporated
Inventor: Alexei Sadovnikov , Sheldon Douglas Haynie , Ujwal Radhakrishna
Abstract: A microelectronic device includes a doped region of semiconductor material having a first region and an opposite second region. The microelectronic device is configured to provide a first operational potential at the first region and to provide a second operational potential at the second region. The microelectronic device includes field plate segments in trenches extending into the doped region. Each field plate segment is separated from the semiconductor material by a trench liner of dielectric material. The microelectronic device further includes circuitry electrically connected to each of the field plate segments. The circuitry is configured to apply bias potentials to the field plate segments. The bias potentials are monotonic with respect to distances of the field plate segments from the first region of the doped region.
-
-
-
-
-
-
-