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公开(公告)号:US20200067400A1
公开(公告)日:2020-02-27
申请号:US16109276
申请日:2018-08-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Xiong Li , Toru Tanaka
IPC: H02M1/32 , H02M7/5387 , H02M1/08 , H02P27/08
Abstract: A gate driver controller, inverter circuit apparatus, and associated discharge method for electric vehicles are disclosed. An example gate driver controller includes a mode determiner to set a mode of operation of the gate driver. The example device includes a gate driver control to control the gate driver to set the gate driver to: a) on, b) off, or c) generate a pulse width modulation signal. When in a first operating mode and set to on, stored energy is to be transferred from a capacitor to a motor winding inductor via a power transistor activated by the gate driver to dissipate a first portion of the stored energy. When in a second operating mode, a second portion of the stored energy is to be transferred from the motor winding inductor to the power transistor to dissipate the second portion of the stored energy.
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公开(公告)号:US20190245541A1
公开(公告)日:2019-08-08
申请号:US16388353
申请日:2019-04-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Xiong Li , Toru Tanaka
IPC: H03K19/0952 , H03K5/19 , H03K19/017 , H02M7/5387 , H03K17/22 , H02M7/537 , H03K17/06
CPC classification number: H03K19/0952 , H02M7/537 , H02M7/53873 , H03K5/19 , H03K17/063 , H03K17/223 , H03K19/01707
Abstract: A gate driver includes a drive signal input terminal, a drive signal output terminal, a gate drive circuit, and a serial communication interface. The drive signal input terminal is configured to receive a gate drive signal. The gate drive circuit is coupled to the drive signal input terminal and the drive signal output terminal. The gate drive circuit is configured to provide the gate drive signal to the drive signal output terminal. The serial communication interface is coupled to the drive signal input terminal.
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公开(公告)号:US11838011B2
公开(公告)日:2023-12-05
申请号:US17495968
申请日:2021-10-07
Applicant: Texas Instruments Incorporated
Inventor: Xiong Li , Toru Tanaka
CPC classification number: H03K17/14 , G01K7/16 , H03K17/168 , G01K7/01 , H02P27/08
Abstract: A system comprises a gate driver that is configured to couple to a transistor disposed in a transistor module via a first pin. The gate driver comprises a duty cycle measurement circuit having a first input terminal and a first output terminal, the first input terminal coupled to a second pin via an isolator. The duty cycle measurement circuit comprises a flip-flop, a counter, a shift register, and a comparator. The system comprises an analog to digital converter circuit having a second input terminal, a second output terminal, and a reference terminal, the second input terminal coupled to a third pin configured to couple to a temperature-sensitive device disposed in the transistor module, the second output terminal coupled to a fourth pin via the isolator, and the reference terminal coupled to the first output terminal.
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14.
公开(公告)号:US20190229724A1
公开(公告)日:2019-07-25
申请号:US16371331
申请日:2019-04-01
Applicant: Texas Instruments Incorporated
Inventor: Xiong Li , Anant Kamath
IPC: H03K17/567 , H03K17/18 , G01R31/28
CPC classification number: H03K17/567 , G01R31/2608 , G01R31/2621 , G01R31/2817 , G01R31/2837 , G01R31/2849 , G01R31/42 , H03K17/18
Abstract: An isolated insulated gate bipolar transistor (IGBT) gate driver is provided which integrates circuits, in-module, to support the measurements of threshold voltage, and collector-emitter saturation voltage of IGBTs. The measured gate threshold and collector-emitter saturation voltage can be used as precursors for state of health predictions for IGBTs. During the measurements, IGBTs are biased under specific conditions chosen to quickly elicit collector-emitter saturation and gate threshold information. Integrated analog-to-digital converter (ADC) circuits are used to convert measured analog signals to a digital format. The digitalized signals are transferred to a micro controller unit (MCU) for further processing through serial peripheral interface (SPI) circuits.
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15.
公开(公告)号:US20180102773A1
公开(公告)日:2018-04-12
申请号:US15728230
申请日:2017-10-09
Applicant: Texas Instruments Incorporated
Inventor: Xiong Li , Anant Kamath
IPC: H03K17/567 , G01R31/28
CPC classification number: H03K17/567 , G01R31/2837 , H03K17/18
Abstract: An isolated insulated gate bipolar transistor (IGBT) gate driver is provided which integrates circuits, in-module, to support the measurements of threshold voltage, and collector-emitter saturation voltage of IGBTs. The measured gate threshold and collector-emitter saturation voltage can be used as precursors for state of health predictions for IGBTs. During the measurements, IGBTs are biased under specific conditions chosen to quickly elicit collector-emitter saturation and gate threshold information. Integrated analog-to-digital converter (ADC) circuits are used to convert measured analog signals to a digital format. The digitalized signals are transferred to a micro controller unit (MCU) for further processing through serial peripheral interface (SPI) circuits.
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公开(公告)号:US11108389B2
公开(公告)日:2021-08-31
申请号:US17020608
申请日:2020-09-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Xiong Li , Adam Lee Shook
IPC: H03K17/567 , B60R16/033 , H03K17/687 , H03K17/60 , H03K17/74
Abstract: In a gate driver, a comparator input is adapted to be coupled through a resistor and a diode to a first transistor. A latch input is coupled to a comparator output. A second transistor has a first control terminal and a first output terminal. The first output terminal is adapted to be coupled to a control terminal of the first transistor. A third transistor is smaller than the second transistor. The third transistor has a second control terminal and a second output terminal. The second output terminal is adapted to be coupled to the control terminal of the first transistor. Control logic has a logic input and first and second logic outputs. The logic input is coupled to a latch output. The first logic output is coupled to the first control terminal. The second logic output is coupled to the second control terminal.
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公开(公告)号:US10924001B2
公开(公告)日:2021-02-16
申请号:US16109276
申请日:2018-08-22
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Xiong Li , Toru Tanaka
IPC: H02M1/32 , H02M7/5387 , H02P27/08 , H02M1/08
Abstract: A gate driver controller, inverter circuit apparatus, and associated discharge method for electric vehicles are disclosed. An example gate driver controller includes a mode determiner to set a mode of operation of the gate driver. The example device includes a gate driver control to control the gate driver to set the gate driver to: a) on, b) off, or c) generate a pulse width modulation signal. When in a first operating mode and set to on, stored energy is to be transferred from a capacitor to a motor winding inductor via a power transistor activated by the gate driver to dissipate a first portion of the stored energy. When in a second operating mode, a second portion of the stored energy is to be transferred from the motor winding inductor to the power transistor to dissipate the second portion of the stored energy.
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公开(公告)号:US10784857B1
公开(公告)日:2020-09-22
申请号:US16428455
申请日:2019-05-31
Applicant: Texas Instruments Incorporated
Inventor: Xiong Li , Adam Lee Shook
IPC: H03K17/567 , B60R16/033 , H03K17/687 , H03K17/60 , H03K17/74
Abstract: Adaptive gate drivers and related methods and systems are disclosed. An example gate driver system includes a comparator, a latch having first and second inputs and outputs, the first input coupled to the comparator, a timer having an input and an output, the input coupled to the first output of the latch, the output coupled to the second input of the latch, control logic having an input and first and second outputs, the input coupled to the second output of the latch, first and second transistors having a gate, a first buffer having an input and an output, the input coupled to the first output of the control logic, the output coupled to the gate of the first transistor, and a second buffer having an input and an output, the input coupled to the second output of the control logic, the output coupled to the gate of the second transistor.
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