公开(公告)号：US20210083091A1

公开(公告)日：2021-03-18

申请号：US16572679

申请日：2019-09-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

公开(公告)号：US20200273794A1

公开(公告)日：2020-08-27

申请号：US16283838

申请日：2019-02-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. Khaderbad ,  Keng-Chu Lin ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Yasutoshi Okuno ,  Yu-Yun Peng ,  Chia-Hung Chu

IPC: H01L23/522 ,  H01L29/78 ,  H01L21/768

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate stack and a first dielectric layer over the substrate, a source/drain (S/D) region, a contact, and a via. The first dielectric layer is laterally aside and over the gate stack. The S/D region is located in the substrate on sides of the gate stack. The contact penetrates through the first dielectric layer to electrically connect to the S/D region. The via penetrates through a second dielectric layer to connect to the contact. The via includes a conductive layer and an adhesion promoter layer on sidewalls of the conductive layer. The conductive layer is in contact with the contact.

公开(公告)号：US20200098616A1

公开(公告)日：2020-03-26

申请号：US16362965

申请日：2019-03-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Tang Peng ,  Shuen-Shin Liang ,  Keng-Chu Lin ,  Teng-Chun Tsai

IPC: H01L21/762 ,  H01L21/8234 ,  H01L21/768 ,  H01L21/02

Abstract: Examples of a technique for forming a dielectric material for an integrated circuit are provided herein. In an example, an integrated circuit workpiece is received that includes a recess. A first dielectric precursor is deposited in the recess. The first dielectric precursor includes a non-semiconductor component. A second dielectric precursor is deposited in the recess on the first dielectric precursor, and an annealing process is performed such that a portion of the non-semiconductor component of the first dielectric precursor diffuses into the second dielectric precursor. The non-semiconductor component may include oxygen, and the annealing process may be performed in one of a vacuum or an inert gas environment.

公开(公告)号：US12255239B2

公开(公告)日：2025-03-18

申请号：US17377519

申请日：2021-07-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal Abhijith Khaderbad ,  Keng-Chu Lin ,  Yu-Yun Peng

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: The present disclosure describes a semiconductor device that includes a transistor. The transistor includes a source/drain region that includes a front surface and a back surface opposite to the front surface. The transistor includes a salicide region on the back surface and a channel region in contact with the source/drain region. The channel region has a front surface co-planar with the front surface of the source/drain region. The transistor further includes a gate structure disposed on a front surface of the channel region. The semiconductor device also includes a backside contact structure that includes a conductive contact in contact with the salicide region and a liner layer surrounding the conductive contact.

公开(公告)号：US12148807B2

公开(公告)日：2024-11-19

申请号：US17371245

申请日：2021-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hung Chu ,  Ding-Kang Shih ,  Keng-Chu Lin ,  Pang-Yen Tsai ,  Sung-Li Wang ,  Shuen-Shin Liang ,  Tsungyu Hung ,  Hsu-Kai Chang

IPC: H01L29/417 ,  H01L21/285 ,  H01L29/40 ,  H01L29/423

Abstract: The present disclosure describes a method to form a semiconductor device with backside contact structures. The method includes forming a semiconductor device on a first side of a substrate. The semiconductor device includes a source/drain (S/D) region. The method further includes etching a portion of the S/D region on a second side of the substrate to form an opening and forming an epitaxial contact structure on the S/D region in the opening. The second side is opposite to the first side. The epitaxial contact structure includes a first portion in contact with the S/D region in the opening and a second portion on the first portion. A width of the second portion is larger than the first portion.

公开(公告)号：US20240379425A1

公开(公告)日：2024-11-14

申请号：US18781296

申请日：2024-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Yu Lai ,  Chin-Szu Lee ,  Szu-Hua Wu ,  Shuen-Shin Liang ,  Chia-Hung Chu ,  Keng-Chu Lin ,  Sung-Li Wang

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/40 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66

Abstract: A method includes forming a device region over a substrate; forming a first dielectric layer over the device region; forming an opening in the first dielectric layer; conformally depositing a first conductive material along sidewalls and bottom surfaces of the opening; depositing a second conductive material on the first conductive material to fill the opening, wherein the second conductive material is different from the first conductive material; and performing a first thermal process to form an interface region extending from a first region of the first conductive material to a second region of the second conductive material, wherein the interface region includes a homogeneous mixture of the first conductive material and the second conductive material.

公开(公告)号：US20240332357A1

公开(公告)日：2024-10-03

申请号：US18193878

申请日：2023-03-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Yu Yen ,  Keng-Chu Lin

IPC: H01L29/06 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: In an embodiment, a method includes: forming a sacrificial spacer in a contact opening, the contact opening exposing a source/drain region; depositing a spacer layer on a sidewall of the sacrificial spacer and on a top surface of the source/drain region; forming a protective dielectric on the spacer layer and in the contact opening; removing the sacrificial spacer to form a recess adjacent the spacer layer; and forming a dielectric cap in an upper portion of the recess by redepositing a material of the protective dielectric and a material of the spacer layer in the upper portion of the recess, the dielectric cap sealing a lower portion of the recess to form a void.

公开(公告)号：US11901220B2

公开(公告)日：2024-02-13

申请号：US16937237

申请日：2020-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chen-Han Wang ,  Keng-Chu Lin ,  Tetsuji Ueno ,  Ting-Ting Chen

IPC: H01L21/768 ,  H01L29/66

CPC classification number: H01L21/7682 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76832 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6653

Abstract: The present disclosure relates to a method for forming a semiconductor device includes forming an opening between first and second sidewalls of respective first and second terminals. The first and second sidewalls oppose each other. The method further includes depositing a first dielectric material at a first deposition rate on top portions of the opening and depositing a second dielectric material at a second deposition rate on the first dielectric material and on the first and second sidewalls. The second dielectric material and the first and second sidewalls entrap a pocket of air. The method also includes performing a treatment process on the second dielectric material.

公开(公告)号：US11848238B2

公开(公告)日：2023-12-19

申请号：US16916397

申请日：2020-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tetsuji Ueno ,  Ting-Ting Chen

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06 ,  H01L29/786

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823468 ,  H01L29/0653 ,  H01L29/42392 ,  H01L29/4991 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78696

Abstract: The present disclosure describes a method of fabricating a semiconductor structure that includes forming a fin structure on a substrate, forming a polysilicon gate structure on a first portion of the fin structure, forming an opening in a second portion of the fin structure, wherein the first and second portions of the fin structure is adjacent to each other, forming a recess laterally on a sidewall of the first portion of the fin structure underlying the polysilicon gate structure, and forming an inner spacer structure within the recess. The inner spacer structure comprises an inner air spacer enclosed by a first dielectric spacer layer and a second dielectric spacer layer.

公开(公告)号：US11823896B2

公开(公告)日：2023-11-21

申请号：US16283109

申请日：2019-02-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mrunal A. Khaderbad ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Sung-Li Wang ,  Yasutoshi Okuno ,  Yu-Yun Peng

IPC: H01L21/02 ,  H01L21/768

CPC classification number: H01L21/0228 ,  H01L21/76816 ,  H01L21/76879

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a dielectric structure on a semiconductor substrate, introducing a first gas on the dielectric structure to form first conductive structures on the dielectric structure, and introducing a second gas on the first conductive structures and the dielectric structure. The second gas is different from the first gas. The method also includes introducing a third gas on the first conductive structures and the dielectric structure to form second conductive structures on the dielectric structure. The first gas and the third gas include the same metal.