公开(公告)号：US09796582B1

公开(公告)日：2017-10-24

申请号：US15363571

申请日：2016-11-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: H01L21/82 ,  B81C1/00 ,  B81B7/00 ,  H01L23/532

CPC classification number: B81C1/00246 ,  B81C2203/0735 ,  B81C2203/0771 ,  H01L21/82 ,  H01L23/53295 ,  H01L2924/1461

Abstract: A method for integrating complementary metal-oxide-semiconductor (CMOS) devices with a microelectromechanical systems (MEMS) device using a flat surface above a sacrificial layer is provided. In some embodiments, a back-end-of-line (BEOL) interconnect structure is formed covering a semiconductor substrate, where the BEOL interconnect structure comprises a first dielectric region. A sacrificial layer is formed over the first dielectric region, and a second dielectric region is formed covering the sacrificial layer and the first dielectric region. A planarization is performed into an upper surface of the second dielectric region to planarize the upper surface. A MEMS structure is formed on the planar upper surface of the second dielectric region. A cavity etch is performed into the sacrificial layer, through the MEMS structure, to remove the sacrificial layer and to form a cavity in place of the sacrificial layer. An integrated circuit (IC) resulting from the method is also provided.

公开(公告)号：US09403673B2

公开(公告)日：2016-08-02

申请号：US14880375

申请日：2015-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Kuei-Sung Chang ,  Chun-Wen Cheng

IPC: H01L21/00 ,  B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B2203/0163 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C1/00166 ,  B81C1/00301 ,  B81C1/00801 ,  B81C2203/0118

Abstract: A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.

公开(公告)号：US20160031703A1

公开(公告)日：2016-02-04

申请号：US14880375

申请日：2015-10-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Kuei-Sung Chang ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B2203/0163 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C1/00166 ,  B81C1/00301 ,  B81C1/00801 ,  B81C2203/0118

Abstract: A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.

Abstract translation: 提供了一种用于微机电系统（MEMS）装置的半导体结构。 第一衬底区域包括布置在第一衬底区域的顶表面上方的电隔离层。 第二衬底区域布置在电隔离层上方并且包括布置在第二衬底区域内的MEMS器件结构。 MEMS器件结构包括固定质量和检验质量。 电介质区域布置在固定质量块周围的电隔离层的上方。 固定质量电极布置在电介质区周围，并且延伸穿过第二衬底区域到电隔离层。 隔离电极通过第二衬底区域和电隔离层延伸到与固定质量电极相反的一侧的第一衬底区域。 还提供了形成半导体结构的方法。

公开(公告)号：US09221674B1

公开(公告)日：2015-12-29

申请号：US14450505

申请日：2014-08-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Kuei-Sung Chang ,  Chun-Wen Cheng

IPC: H01L21/00 ,  B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B2203/0163 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C1/00166 ,  B81C1/00301 ,  B81C1/00801 ,  B81C2203/0118

Abstract: A semiconductor structure for a microelectromechanical systems (MEMS) device is provided. A first substrate region includes an electrical isolation layer arranged over a top surface of the first substrate region. A second substrate region is arranged over the electrical isolation layer and includes a MEMS device structure arranged within the second substrate region. The MEMS device structure includes a fixed mass and a proof mass. A dielectric region is arranged over the electrical isolation layer around the fixed mass. A fixed mass electrode is arranged around the dielectric region, and extends through the second substrate region to the electrical isolation layer. An isolated electrode extends through the second substrate region and the electrical isolation layer to the first substrate region on an opposite side of the proof mass as the fixed mass electrode. The method of forming the semiconductor structure is also provided.

Abstract translation: 提供了一种用于微机电系统（MEMS）装置的半导体结构。 第一衬底区域包括布置在第一衬底区域的顶表面上方的电隔离层。 第二衬底区域布置在电隔离层上方并且包括布置在第二衬底区域内的MEMS器件结构。 MEMS器件结构包括固定质量和检验质量。 电介质区域布置在固定质量块周围的电隔离层的上方。 固定质量电极布置在电介质区周围，并且延伸穿过第二衬底区域到电隔离层。 隔离电极通过第二衬底区域和电隔离层延伸到与固定质量电极相反的一侧的第一衬底区域。 还提供了形成半导体结构的方法。

公开(公告)号：US20150060954A1

公开(公告)日：2015-03-05

申请号：US14013080

申请日：2013-08-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Kai-Chih Liang ,  Chia-Hua Chu

IPC: B81B7/02 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81C1/00238 ,  B81B2201/0264

Abstract: A sensor is made up of two substrates which are adhered together. A first substrate includes a pressure-sensitive micro-electrical-mechanical (MEMS) structure and a conductive contact structure that protrudes outwardly beyond a first face of the first substrate. A second substrate includes a complementary metal oxide semiconductor (CMOS) device and a receiving structure made up of sidewalls that meet a conductive surface which is recessed from a first face of the second substrate. A conductive bonding material physically adheres the conductive contact structure to the conductive surface and electrically couples the MEMS structure to the CMOS device.

Abstract translation: 传感器由粘合在一起的两个基板组成。 第一衬底包括压敏微电机械（MEMS）结构和向外突出超过第一衬底的第一面的导电接触结构。 第二基板包括互补金属氧化物半导体（CMOS）器件和由侧壁构成的接收结构，所述接收结构满足从第二基板的第一面凹入的导电表面。 导电接合材料将导电接触结构物理地粘附到导电表面并将MEMS结构电耦合到CMOS器件。

公开(公告)号：US20230278856A1

公开(公告)日：2023-09-07

申请号：US18315799

申请日：2023-05-11

Applicant: Taiwan Semiconductor manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0006 ,  B81C1/00246 ,  B81B7/0051 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/0257 ,  B81C2203/0714 ,  B81C2201/112 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2203/0735

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US20220380208A1

公开(公告)日：2022-12-01

申请号：US17884946

申请日：2022-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.,

Inventor： Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81C1/00

Abstract: A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.

公开(公告)号：US11485631B2

公开(公告)日：2022-11-01

申请号：US16950213

申请日：2020-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuei-Sung Chang ,  Chia-Hua Chu ,  Shang-Ying Tsai

IPC: B81C1/00 ,  B81B7/00

Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The MEMS substrate comprises a moveable element arranged over a carrier substrate. The epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts overlies the epitaxial layer. A first subset of the plurality of contacts overlies the moveable element. The plurality of contacts respectively has an ohmic contact with the epitaxial layer.

公开(公告)号：US20210070612A1

公开(公告)日：2021-03-11

申请号：US16950213

申请日：2020-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuei-Sung Chang ,  Chia-Hua Chu ,  Shang-Ying Tsai

IPC: B81C1/00 ,  B81B7/00

Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The MEMS substrate comprises a moveable element arranged over a carrier substrate. The epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts overlies the epitaxial layer. A first subset of the plurality of contacts overlies the moveable element. The plurality of contacts respectively has an ohmic contact with the epitaxial layer.

公开(公告)号：US10526196B2

公开(公告)日：2020-01-07

申请号：US15873937

申请日：2018-01-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Chuan Teng ,  Chun-Yin Tsai ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: H01L41/113 ,  B81B3/00 ,  B81C1/00 ,  H04R19/00

Abstract: Structures and formation methods of a semiconductor device structure are provided. A semiconductor device structure includes a first dielectric layer and a second dielectric layer over a semiconductor substrate. A cavity penetrates through the first dielectric layer and the second dielectric layer. The semiconductor device structure also includes a first movable membrane between the first dielectric layer and the second dielectric layer. The first movable membrane is partially exposed through the cavity. The first movable membrane includes first corrugated portions arranged along an edge of the cavity.