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公开(公告)号：US11655138B2
公开(公告)日：2023-05-23
申请号：US17302484
申请日：2021-05-04
Inventor： Hsi-Cheng Hsu , Kuo-Hao Lee , Jui-Chun Weng , Ching-Hsiang Hu , Ji-Hong Chiang , Lavanya Sanagavarapu , Chia-Yu Lin , Chia-Chun Hung , Jia-Syuan Li , Yu-Pei Chiang
CPC classification number: B81B3/0005 , B81C1/00968 , B81C2201/112 , B81C2201/115
Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.
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公开(公告)号：US09802815B2
公开(公告)日：2017-10-31
申请号：US14957562
申请日：2015-12-02
Applicant: Invensense, Inc.
Inventor： Michael Julian Daneman , Mei-Lin Chan , Martin Lim , Fariboz Assaderaghi , Erhan Polatkan Ata
CPC classification number: B81C1/00246 , B81B2201/0257 , B81B2201/0264 , B81B2203/0127 , B81B2207/012 , B81C1/00158 , B81C2201/112 , B81C2203/0118 , B81C2203/0742 , B81C2203/0792 , H01L2224/83805
Abstract: A method for fabricating a MEMS device includes depositing and patterning a first sacrificial layer onto a silicon substrate, the first sacrificial layer being partially removed leaving a first remaining oxide. Further, the method includes depositing a conductive structure layer onto the silicon substrate, the conductive structure layer making physical contact with at least a portion of the silicon substrate. Further, a second sacrificial layer is formed on top of the conductive structure layer. Patterning and etching of the silicon substrate is performed stopping at the second sacrificial layer. Additionally, the MEMS substrate is bonded to a CMOS wafer, the CMOS wafer having formed thereupon a metal layer. An electrical connection is formed between the MEMS substrate and the metal layer.
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公开(公告)号：US09611141B2
公开(公告)日：2017-04-04
申请号：US14564346
申请日：2014-12-09
Inventor： Ping-Yin Liu , Li-Cheng Chu , Hung-Hua Lin , Shang-Ying Tsai , Yuan-Chih Hsieh , Jung-Huei Peng , Lan-Lin Chao , Chia-Shiung Tsai , Chun-Wen Cheng
CPC classification number: B81C1/00269 , B32B7/12 , B32B15/043 , B32B15/20 , B32B2255/24 , B32B2307/746 , B32B2457/00 , B81B3/0005 , B81C2201/112 , Y10T428/12674 , Y10T428/12708 , Y10T428/12736 , Y10T428/12986
Abstract: The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
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公开(公告)号：US20160229693A1
公开(公告)日：2016-08-11
申请号：US14564346
申请日：2014-12-09
Inventor： Ping-Yin Liu , Li-Cheng Chu , Hung-Hua Lin , Shang-Ying Tsai , Yuan-Chih Hsieh , Jung-Huei Peng , Lan-Lin Chao , Chia-Shiung Tsai , Chun-Wen Cheng
CPC classification number: B81C1/00269 , B32B7/12 , B32B15/043 , B32B15/20 , B32B2255/24 , B32B2307/746 , B32B2457/00 , B81B3/0005 , B81C2201/112 , Y10T428/12674 , Y10T428/12708 , Y10T428/12736 , Y10T428/12986
Abstract: A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer.
Abstract translation: 公开了没有抗静电层和粘合方法的键。 一种示例性方法包括形成第一粘合层; 在所述第一接合层上形成中间层; 在中间层上形成抗静电层; 以及从所述第一接合层和中间层形成液体，使得所述抗静电层浮在所述第一接合层上。 第二接合层可以结合到第一接合层，同时抗静电层漂浮在第一接合层上，使得第一和第二接合层之间的接合没有抗静电层。
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公开(公告)号：US09174835B2
公开(公告)日：2015-11-03
申请号：US12979160
申请日：2010-12-27
Applicant: Ming Fang
Inventor： Ming Fang
CPC classification number: B81C1/00666 , B81B7/0029 , B81B2203/0181 , B81C1/0019 , B81C2201/0169 , B81C2201/112
Abstract: A method of manufacturing microstructures, such as MEMS or NEMS devices, including forming a protective layer on a surface of a moveable component of the microstructure. For example, a silicide layer may be formed on one or more surfaces of a poly-silicon mass that is moveable with respect to a substrate of the microstructure. The process may be self-aligning.
Abstract translation: 一种制造微结构的方法，例如MEMS或NEMS器件，包括在微结构的可移动部件的表面上形成保护层。 例如，可以在可相对于微结构的基板移动的多晶硅块的一个或多个表面上形成硅化物层。 该过程可以是自对准的。
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Patent Agency Ranking
6.发明授权Reducing microelectromechanical systems stiction by formation of a silicon carbide layer 有权通过形成碳化硅层来减少微机电系统的粘滞公开(公告)号：US09108842B2
公开(公告)日：2015-08-18
申请号：US13946729
申请日：2013-07-19
Applicant: Michael D. Turner , Ruben B. Montez
Inventor： Michael D. Turner , Ruben B. Montez
CPC classification number: B81C1/0038 , B81B3/0005 , B81C2201/112
Abstract: A mechanism is provided for reducing stiction in a MEMS device by forming a near-uniform silicon carbide layer on silicon surfaces using carbon from TEOS-based silicon oxide sacrificial films used during fabrication. By using the TEOS as a source of carbon to form an antistiction coating, all silicon surfaces can be coated, including those that are difficult to coat using standard self-assembled monolayer (SAM) processes (e.g., locations beneath the proof mass). Controlled processing parameters, such as temperature, length of time for annealing, and the like, provide for a near-uniform silicon carbide coating not provided by previous processes.
Abstract translation: 提供了一种用于通过在制造期间使用的基于TEOS的氧化硅牺牲膜的碳在硅表面上形成近均匀的碳化硅层来减少MEMS器件中的静摩擦的机构。 通过使用TEOS作为碳源来形成抗静电涂层，可以涂覆所有的硅表面，包括使用标准自组装单层（SAM）工艺（例如，证明质量下方的位置）难以涂覆的硅表面。 诸如温度，退火时间长度等受控加工参数提供了以前的方法未提供的近均匀的碳化硅涂层。
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公开(公告)号：US08905293B2
公开(公告)日：2014-12-09
申请号：US12964347
申请日：2010-12-09
Applicant: Ping-Yin Liu , Li-Cheng Chu , Hung-Hua Lin , Shang-Ying Tsai , Yuan-Chih Hsieh , Jung-Huei Peng , Lan-Lin Chao , Chia-Shiung Tsai , Chun-Wen Cheng
Inventor： Ping-Yin Liu , Li-Cheng Chu , Hung-Hua Lin , Shang-Ying Tsai , Yuan-Chih Hsieh , Jung-Huei Peng , Lan-Lin Chao , Chia-Shiung Tsai , Chun-Wen Cheng
CPC classification number: B81C1/00269 , B32B7/12 , B32B15/043 , B32B15/20 , B32B2255/24 , B32B2307/746 , B32B2457/00 , B81B3/0005 , B81C2201/112 , Y10T428/12674 , Y10T428/12708 , Y10T428/12736 , Y10T428/12986
Abstract: A bond free of an anti-stiction layer and bonding method is disclosed. An exemplary method includes forming a first bonding layer; forming an interlayer over the first bonding layer; forming an anti-stiction layer over the interlayer; and forming a liquid from the first bonding layer and interlayer, such that the anti-stiction layer floats over the first bonding layer. A second bonding layer can be bonded to the first bonding layer while the anti-stiction layer floats over the first bonding layer, such that a bond between the first and second bonding layers is free of the anti-stiction layer.
Abstract translation: 公开了没有抗静电层和粘合方法的键。 一种示例性方法包括形成第一粘合层; 在所述第一接合层上形成中间层; 在中间层上形成抗静电层; 以及从所述第一接合层和中间层形成液体，使得所述抗静电层浮在所述第一接合层上。 第二接合层可以结合到第一接合层，同时抗静电层漂浮在第一接合层上，使得第一和第二接合层之间的接合没有抗静电层。
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公开(公告)号：US08895339B2
公开(公告)日：2014-11-25
申请号：US13718598
申请日：2012-12-18
Applicant: Ruben B. Montez , Robert F. Steimle
Inventor： Ruben B. Montez , Robert F. Steimle
CPC classification number: B81B3/0005 , B81B2201/0221 , B81B2201/0235 , B81B2203/0181 , B81B2203/06 , B81C1/0038 , B81C1/00952 , B81C2201/0169 , B81C2201/112 , G01P15/0802 , G01P2015/0871 , G01P2015/0874
Abstract: A mechanism for reducing stiction in a MEMS device by decreasing an amount of carbon from TEOS-based silicon oxide films that can accumulate on polysilicon surfaces during fabrication is provided. A carbon barrier material film is deposited between one or more polysilicon layer in a MEMS device and the TEOS-based silicon oxide layer. This barrier material blocks diffusion of carbon into the polysilicon, thereby reducing accumulation of carbon on the polysilicon surfaces. By reducing the accumulation of carbon, the opportunity for stiction due to the presence of the carbon is similarly reduced.
Abstract translation: 提供了一种用于通过减少在制造期间可能积聚在多晶硅表面上的基于TEOS的氧化硅膜的碳来减少MEMS器件中的静电的机制。 在MEMS器件中的一个或多个多晶硅层和基于TEOS的氧化硅层之间沉积碳阻挡材料膜。 该阻挡材料阻止碳扩散到多晶硅中，从而减少碳在多晶硅表面上的积累。 通过减少碳的积累，由于碳的存在而导致的静电机会同样地减少。
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公开(公告)号：US20140308822A1
公开(公告)日：2014-10-16
申请号：US14241643
申请日：2012-08-31
Applicant: Anthony O'Hara
Inventor： Anthony O'Hara
IPC: B81C1/00
CPC classification number: B81C1/00952 , B81C1/0038 , B81C2201/112 , C23C16/44
Abstract: The present invention describes a deposition method suitable for depositing a coating on a device. The method is particularly suited for depositing a self assembled monolayer (SAM) coating on a micro electro-mechanical structures (MEMS). The method employs carrier gases in order to form a deposition vapour in a process chamber within which the device is located wherein the deposition vapour comprises controlled amounts of a vapour precursor material and a vapour reactant material. Employing the described technique avoids the problematic effects of particulate contamination of the device even when the volumetric ratio of the reactant material to the precursor material is significantly higher than those ratios previously employed in the art. The vapour precursor material can be of a type that provides the MEMS with an anti-stiction coating with the associated vapour reactant material comprising water.
Abstract translation: 本发明描述了一种适用于在装置上沉积涂层的沉积方法。 该方法特别适用于在微机电结构（MEMS）上沉积自组装单层（SAM）涂层。 该方法使用载气，以便在其中设置的处理室中形成沉积蒸气，其中沉积蒸气包含受控量的蒸气前体材料和蒸汽反应物料。 即使当反应物材料与前体材料的体积比显着高于本领域中先前使用的比例时，采用所述技术也避免了装置的颗粒污染的有问题的影响。 蒸汽前体材料可以是向MEMS提供具有包含水的相关蒸汽反应物材料的抗静电涂层的类型。
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公开(公告)号：US20140167188A1
公开(公告)日：2014-06-19
申请号：US13718598
申请日：2012-12-18
Applicant: Ruben B. Montez , Robert F. Steimle
Inventor： Ruben B. Montez , Robert F. Steimle
CPC classification number: B81B3/0005 , B81B2201/0221 , B81B2201/0235 , B81B2203/0181 , B81B2203/06 , B81C1/0038 , B81C1/00952 , B81C2201/0169 , B81C2201/112 , G01P15/0802 , G01P2015/0871 , G01P2015/0874
Abstract: A mechanism for reducing stiction in a MEMS device by decreasing an amount of carbon from TEOS-based silicon oxide films that can accumulate on polysilicon surfaces during fabrication is provided. A carbon barrier material film is deposited between one or more polysilicon layer in a MEMS device and the TEOS-based silicon oxide layer. This barrier material blocks diffusion of carbon into the polysilicon, thereby reducing accumulation of carbon on the polysilicon surfaces. By reducing the accumulation of carbon, the opportunity for stiction due to the presence of the carbon is similarly reduced.
Abstract translation: 提供了一种用于通过减少在制造期间可能积聚在多晶硅表面上的基于TEOS的氧化硅膜的碳来减少MEMS器件中的静电的机制。 在MEMS器件中的一个或多个多晶硅层和基于TEOS的氧化硅层之间沉积碳阻挡材料膜。 该阻挡材料阻止碳扩散到多晶硅中，从而减少碳在多晶硅表面上的积累。 通过减少碳的积累，由于碳的存在而导致的静电机会同样地减少。
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