公开(公告)号：US11988600B2

公开(公告)日：2024-05-21

申请号：US16467091

申请日：2017-12-08

Applicant: National University of Singapore ,  The Regents of the University of California

Inventor： Enrico Macrelli ,  Massimo Bruno Cristiano Alioto ,  Chengkuo Lee ,  Costas John Spanos ,  You Qian

IPC: G01N33/00 ,  B81B3/00 ,  B81C1/00 ,  G01N21/3504 ,  H10N10/01 ,  H10N10/80

CPC classification number: G01N21/3504 ,  B81B3/0083 ,  B81C1/00246 ,  G01N33/0031 ,  H10N10/01 ,  H10N10/80 ,  B81B2203/0315 ,  B81B2207/07 ,  B81C2203/0714 ,  G01N2201/02

Abstract: A gas sensor, a method of manufacturing a gas sensor, a method for fabricating a micro electro-mechanical system (MEMS) die for a heater or thermopile, and a micro electro-mechanical system (MEMS) die for a heater or thermopile. The gas sensor comprises a first micro electro-mechanical system (MEMS) die comprising a light source; a second MEMS die comprising a light detector; a sample chamber disposes in an optical path between the light source and the light detector; and a holder substrate; wherein the first and second MEMS dies are disposed on the holder substrate in a vertical orientation relative to the holder.

公开(公告)号：US20230278856A1

公开(公告)日：2023-09-07

申请号：US18315799

申请日：2023-05-11

Applicant: Taiwan Semiconductor manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0006 ,  B81C1/00246 ,  B81B7/0051 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/0257 ,  B81C2203/0714 ,  B81C2201/112 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2201/0132 ,  B81C2201/0133 ,  B81C2203/0735

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US20180086627A1

公开(公告)日：2018-03-29

申请号：US15573342

申请日：2015-06-22

Applicant: Intel Corporation

Inventor： Kevin LAI LIN ,  Chytra PAWASHE ,  Raseong KIM ,  Ian A. YOUNG ,  Kanwal Jit SINGH ,  Robert L. BRISTOL

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2207/015 ,  B81B2207/07 ,  B81B2207/092 ,  B81B2207/094 ,  B81B2207/095 ,  B81C1/00246 ,  B81C1/00301 ,  B81C2201/0109 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0771 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76829

Abstract: A conductive layer is deposited into a trench in a sacrificial layer on a substrate. An etch stop layer is deposited over the conductive layer. The sacrificial layer is removed to form a gap. In one embodiment, a beam is over a substrate. An interconnect is on the beam. An etch stop layer is over the beam. A gap is between the beam and the etch stop layer.

公开(公告)号：US20170313576A1

公开(公告)日：2017-11-02

申请号：US15652960

申请日：2017-07-18

Applicant: Foresee Technology Corp.

Inventor： Chien-Chang CHEN ,  Yi-Der LIANG ,  Shiao-Yi LIN ,  Cheng-Kuang YANG

IPC: B81B3/00 ,  B81C1/00 ,  H04R19/00 ,  H04R19/04

CPC classification number: B81B3/0054 ,  B81B3/0078 ,  B81B2201/0257 ,  B81B2203/0118 ,  B81B2203/0127 ,  B81B2203/0307 ,  B81B2203/0361 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/013 ,  B81C2201/053 ,  B81C2203/0714 ,  B81C2203/0735 ,  H04R19/005 ,  H04R19/04

Abstract: The present invention disclosed a micro acoustic collector with a lateral cavity, comprising: a base metal layer; a movable film, an annular side wall; a lateral metal layer. The movable film faces towards the base metal layer to form a hollow space. The lateral metal layer is formed at a side of the movable film and around the movable film, fixed by the annular side wall and spaced apart from peripheral of the movable film by a distance, and the lateral metal layer faces towards the base metal layer to form a lateral cavity to assist an acoustic collection.

公开(公告)号：US20170297904A1

公开(公告)日：2017-10-19

申请号：US15205619

申请日：2016-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shiang-Chi Lin ,  Jung-Huei Peng ,  Yu-Chia Liu ,  Yi-Chien Wu

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0038 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2203/04 ,  B81B2207/012 ,  B81B2207/07 ,  B81C1/00285 ,  B81C2201/013 ,  B81C2201/016 ,  B81C2203/0109 ,  B81C2203/035 ,  B81C2203/0714 ,  B81C2203/0792

Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.

公开(公告)号：US20160264410A1

公开(公告)日：2016-09-15

申请号：US15162997

申请日：2016-05-24

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Michael T. Brigham ,  Christopher V. Jahnes ,  Cameron E. Luce ,  Jeffrey C. Maling ,  William J. Murphy ,  Anthony K. Stamper ,  Eric J. White

IPC: B81C1/00

CPC classification number: B81C1/0015 ,  B81B3/0021 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2207/09 ,  B81C1/00047 ,  B81C1/00269 ,  B81C1/00365 ,  B81C1/00531 ,  B81C1/00936 ,  B81C2201/0104 ,  B81C2201/0107 ,  B81C2201/0121 ,  B81C2201/0125 ,  B81C2201/0132 ,  B81C2201/0176 ,  B81C2201/0181 ,  B81C2203/0109 ,  B81C2203/0145 ,  B81C2203/0714 ,  G06F17/5009

Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.

公开(公告)号：US20150353344A1

公开(公告)日：2015-12-10

申请号：US14832426

申请日：2015-08-21

Applicant: Infineon Technologies AG

Inventor： Bernhard Winkler ,  Andreas Zankl ,  Klemens Pruegl ,  Stefan Kolb

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/008 ,  B81B2201/0264 ,  B81B2203/0315 ,  B81B2207/015 ,  B81C1/00158 ,  B81C1/00246 ,  B81C2203/0707 ,  B81C2203/0714 ,  B81C2203/0735 ,  B81C2203/0771 ,  H01L27/0611

Abstract: Embodiments relate to MEMS devices and methods for manufacturing MEMS devices. In one embodiment, the manufacturing includes forming a monocrystalline sacrificial layer on a non-silicon-on-insulator (non-SOI) substrate, patterning the monocrystalline sacrificial layer such that the monocrystalline sacrificial layer remains in a first portion and is removed in a second portion lateral to the first portion; depositing a first silicon layer, the first silicon layer deposited on the remaining monocrystalline sacrificial layer and further lateral to the first portion; removing at least a portion of the monocrystalline sacrificial layer via at least one release aperture in the first silicon layer to form a cavity and sealing the cavity.

Abstract translation: 实施例涉及用于制造MEMS器件的MEMS器件和方法。 在一个实施例中，制造包括在绝缘体上非绝缘体（非SOI）衬底上形成单晶牺牲层，图案化单晶牺牲层，使得单晶牺牲层保持在第一部分中并在第二部分中被去除 部分横向于第一部分; 沉积第一硅层，所述第一硅层沉积在剩余的单晶牺牲层上，并且进一步横向于所述第一部分; 通过所述第一硅层中的至少一个释放孔去除所述单晶牺牲层的至少一部分，以形成空腔并密封所述空腔。

公开(公告)号：US20150035089A1

公开(公告)日：2015-02-05

申请号：US13956457

申请日：2013-08-01

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： YU-CHIA LIU ,  CHIA-HUA CHU ,  JUNG-HUEI PENG ,  KUEI-SUNG CHANG ,  CHUN-WEN CHENG

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B7/02 ,  B81C2203/0714

Abstract: A method for forming a MEMS device is provided. The method includes the following steps of providing a substrate having a first portion and a second portion; fabricating a membrane type sensor on the first portion of the substrate; and fabricating a bulk silicon sensor on the second portion of the substrate.

Abstract translation: 提供了一种用于形成MEMS器件的方法。 该方法包括以下步骤：提供具有第一部分和第二部分的基底; 在所述基板的第一部分上制造膜型传感器; 以及在所述衬底的第二部分上制造体硅传感器。

公开(公告)号：US20150004732A1

公开(公告)日：2015-01-01

申请号：US14489495

申请日：2014-09-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Bang-Chiang Lan ,  Li-Hsun Ho ,  Wei-Cheng Wu ,  Hui-Min Wu ,  Min Chen ,  Tzung-I Su ,  Chien-Hsin Huang

IPC: B81C1/00

CPC classification number: B81C1/00246 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2203/0714 ,  B81C2203/0742 ,  B81C2203/0792 ,  H01L27/0688

Abstract: A method of fabricating an integrated structure for MEMS device and semiconductor device comprises steps of: providing a substrate having a transistor thereon in a semiconductor device region and a first MEMS component thereon in a MEMS region; performing a interconnect process on the substrate in the semiconductor device region to form a plurality of first dielectric layers, at least a conductive plug and at least a conductive layer in the first dielectric layers; forming a plurality of second dielectric layers and an etch stopping device in the second dielectric layers on the substrate in a etch stopping device region; forming a plurality of third dielectric layers and at least a second MEMS component in the third dielectric layers on the substrate in the MEMS region; and performing an etching process to remove the third dielectric layers in the MEMS region.

Abstract translation: 制造用于MEMS器件和半导体器件的集成结构的方法包括以下步骤：在半导体器件区域中提供其上具有晶体管的衬底及其中的MEMS区域中的第一MEMS部件; 在所述半导体器件区域中的所述衬底上执行互连处理，以形成多个第一电介质层，所述第一介电层中的至少导电插塞和至少导电层; 在蚀刻停止装置区域中在衬底上的第二介电层中形成多个第二电介质层和蚀刻停止装置; 在MEMS区域中的衬底上的第三电介质层中形成多个第三电介质层和至少第二MEMS部件; 并执行蚀刻工艺以去除MEMS区域中的第三介电层。

公开(公告)号：US20140339655A1

公开(公告)日：2014-11-20

申请号：US14449583

申请日：2014-08-01

Applicant: PixArt Imaging Inc.

Inventor： HSIN-HUI HSU ,  SHENG-TA LEE ,  CHUAN-WEI WANG

IPC: B81B7/00

CPC classification number: B81B7/0058 ,  B81B7/0006 ,  B81B2201/0264 ,  B81C1/00246 ,  B81C1/00293 ,  B81C2203/0136 ,  B81C2203/0145 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: A MEMS package structure, including a substrate, an interconnecting structure, an upper metallic layer, a deposition element and a packaging element is provided. The interconnecting structure is disposed on the substrate. The MEMS structure is disposed on the substrate and within a first cavity. The upper metallic layer is disposed above the MEMS structure and the interconnecting structure, so as to form a second cavity located between the upper metallic layer and the interconnecting structure and communicates with the first cavity. The upper metallic layer has at least a first opening located above the interconnecting structure and at least a second opening located above the MEMS structure. Area of the first opening is greater than that of the second opening. The deposition element is disposed above the upper metallic layer to seal the second opening. The packaging element is disposed above the upper metallic layer to seal the first opening.

Abstract translation: 提供了包括基板，互连结构，上金属层，沉积元件和封装元件的MEMS封装结构。 互连结构设置在基板上。 MEMS结构设置在基板上并在第一腔内。 上金属层设置在MEMS结构和互连结构之上，以便形成位于上金属层和互连结构之间的第二腔，并与第一腔连通。 上金属层具有位于互连结构上方的至少第一开口和位于MEMS结构上方的至少第二开口。 第一开口的面积大于第二开口的面积。 沉积元件设置在上金属层上方以密封第二开口。 包装元件设置在上金属层上方以密封第一开口。