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公开(公告)号:US11152306B2
公开(公告)日:2021-10-19
申请号:US16050058
申请日:2018-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Yi Wu , Li-Hsuan Chu , Ching-Wen Wen , Chia-Chun Hung , Chen Liang Chang , Chin-Szu Lee , Hsiang Liu
IPC: H01L23/48 , H01L23/532 , H01L27/146 , H01L21/02 , H01L21/768 , H01L21/762 , H01L23/528 , H01L23/485
Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.
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公开(公告)号:US20210210350A1
公开(公告)日:2021-07-08
申请号:US17205715
申请日:2021-03-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wen-Chin Chen , Cheng-Yi Wu , Yu-Hung Cheng , Ren-Hua Guo , Hsiang Liu , Chin-Szu Lee
Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.
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公开(公告)号:US20200083168A1
公开(公告)日:2020-03-12
申请号:US16681556
申请日:2019-11-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Yi Wu , Li-Hsuan Chu , Ching-Wen Wen , Chia-Chun Hung , Chen Liang Chang , Chin-Szu Lee , Hsiang Liu
IPC: H01L23/532 , H01L23/528 , H01L21/768 , H01L21/02 , H01L23/48 , H01L21/762 , H01L27/146
Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.
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公开(公告)号:US10522353B2
公开(公告)日:2019-12-31
申请号:US16043286
申请日:2018-07-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wen-Chin Chen , Cheng-Yi Wu , Yu-Hung Cheng , Ren-Hua Guo , Hsiang Liu , Chin-Szu Lee
IPC: H01L21/20 , H01L29/66 , H01L29/04 , H01L21/02 , H01L29/08 , H01L29/78 , H01L29/165 , H01L21/306
Abstract: A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.
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公开(公告)号:US20180096936A1
公开(公告)日:2018-04-05
申请号:US15282258
申请日:2016-09-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Yi Wu , Li-Hsuan Chu , Ching-Wen Wen , Chia-Chun Hung , Chen Liang Chang , Chin-Szu Lee , Hsiang Liu
IPC: H01L23/532 , H01L21/02 , H01L21/768 , H01L23/528
CPC classification number: H01L23/5329 , H01L21/02126 , H01L21/0214 , H01L21/02211 , H01L21/02219 , H01L21/02271 , H01L21/0228 , H01L21/76224 , H01L21/76831 , H01L21/76834 , H01L21/76843 , H01L21/76877 , H01L23/481 , H01L23/485 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L27/14614 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L27/14643 , H01L27/14687
Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.
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