公开(公告)号：US11373922B2

公开(公告)日：2022-06-28

申请号：US16993285

申请日：2020-08-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sen-Kuei Hsu ,  Ching-Feng Yang ,  Hsin-Yu Pan ,  Kai-Chiang Wu ,  Yi-Che Chiang

IPC: H01L23/52 ,  H01L23/367 ,  H01L23/00 ,  H01L21/768 ,  H01L23/522 ,  H01L23/538

Abstract: A semiconductor package includes a die, a dummy die, a plurality of conductive terminals, an insulating layer and a plurality of thermal through vias. The dummy die is disposed aside the die. The conductive terminals are disposed at a first side of the dummy die and the die and electrically connected to the dummy die and the die. The insulating layer is disposed at a second side opposite to the first side of the dummy die and the die. The thermal through vias penetrating through the insulating layer.

公开(公告)号：US20210249372A1

公开(公告)日：2021-08-12

申请号：US16787020

申请日：2020-02-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sen-Kuei Hsu ,  Hsin-Yu Pan ,  Yi-Che Chiang

IPC: H01L23/00 ,  G01R31/28

Abstract: A manufacturing method of a semiconductor package includes the following steps. Semiconductor chips are disposed on a carrier. The semiconductor chips are grouped in a plurality of package units. The semiconductor chips are encapsulated in an encapsulant to form a reconstructed wafer. A redistribution structure is formed on the encapsulant. The redistribution structure electrically connects the semiconductor chips within a same package unit of the plurality of package units. The individual package units are separated by cutting through the reconstructed wafer along scribe line regions. In the reconstructed wafer, the plurality of package units are arranged so as to balance the number of scribe line regions extending across opposite halves of the reconstructed wafer in a first direction with respect to the number of scribe line regions extending across opposite halves of the reconstructed wafer in a second direction perpendicular to the first direction.

公开(公告)号：US20210098318A1

公开(公告)日：2021-04-01

申请号：US17121232

申请日：2020-12-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Ding Wang ,  An-Jhih Su ,  Chien Ling Hwang ,  Jung Wei Cheng ,  Hsin-Yu Pan ,  Chen-Hua Yu

IPC: H01L23/04 ,  H01L23/42 ,  H01L23/367 ,  H01L23/00 ,  H01L23/10 ,  H01L21/56 ,  H01L25/065

Abstract: An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

公开(公告)号：US10818651B2

公开(公告)日：2020-10-27

申请号：US16260115

申请日：2019-01-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sen-Kuei Hsu ,  Hsin-Yu Pan ,  Ming-Hsien Tsai

IPC: H01L25/18 ,  H01L23/538 ,  H01L23/522 ,  H01L23/00 ,  H01L23/36 ,  H01L23/31

Abstract: A package structure includes an insulating encapsulation, a semiconductor die, and a filter structure. The semiconductor die is encapsulated in the insulating encapsulation. The filter structure is electrically coupled to the semiconductor die, wherein the filter structure includes a patterned metallization layer with a pattern having a double-spiral having aligned centroids thereof.

公开(公告)号：US10510713B1

公开(公告)日：2019-12-17

申请号：US16172842

申请日：2018-10-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Wei Chen ,  Chih-Hua Chen ,  Hsin-Yu Pan ,  Hao-Yi Tsai ,  Lipu Kris Chuang ,  Tin-Hao Kuo

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L25/00 ,  H01L23/367 ,  H01L23/373 ,  H01L23/538 ,  H01L23/29

Abstract: A semiconductor package includes a redistribution structure, at least one semiconductor device, a heat dissipation component, and an encapsulating material. The at least one semiconductor device is disposed on and electrically connected to the redistribution structure. The heat dissipation component is disposed on the redistribution structure and includes a concave portion for receiving the at least one semiconductor device and an extending portion connected to the concave portion and contacting the redistribution structure, wherein the concave portion contacts the at least one semiconductor device. The encapsulating material is disposed over the redistribution structure, wherein the encapsulating material fills the concave portion and encapsulates the at least one semiconductor device.

公开(公告)号：US10256203B2

公开(公告)日：2019-04-09

申请号：US15662261

申请日：2017-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lipu Kris Chuang ,  Han-Ping Pu ,  Hsin-Yu Pan ,  Sen-Kuei Hsu

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/42 ,  H01L23/367 ,  H01L23/538

Abstract: A semiconductor package includes a die, a passivation layer, a plurality of first electrical conductive vias, a plurality of second electrical conductive vias, a plurality of thermal conductive vias and a connecting pattern. The die includes a plurality of first pads and a plurality of second pads. The passivation layer is disposed on the die. The first electrical conductive vias and the second electrical conductive vias extend through the passivation layer and contact the first pads and the second pads respectively. The thermal conductive vias are disposed on the passivation layer. Each of the thermal conductive vias is spaced apart from the first and second electrical conductive vias. The connecting pattern is disposed on the passivation layer and connects the first electrical conductive vias and the thermal conductive vias. The thermal conductive vias are connected to the first pads through the connecting pattern and the first electrical conductive vias.

公开(公告)号：US20190035752A1

公开(公告)日：2019-01-31

申请号：US15662261

申请日：2017-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lipu Kris Chuang ,  Han-Ping Pu ,  Hsin-Yu Pan ,  Sen-Kuei Hsu

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/367 ,  H01L23/31

Abstract: A semiconductor package includes a die, a passivation layer, a plurality of first electrical conductive vias, a plurality of second electrical conductive vias, a plurality of thermal conductive vias and a connecting pattern. The die includes a plurality of first pads and a plurality of second pads. The passivation layer is disposed on the die. The first electrical conductive vias and the second electrical conductive vias extend through the passivation layer and contact the first pads and the second pads respectively. The thermal conductive vias are disposed on the passivation layer. Each of the thermal conductive vias is spaced apart from the first and second electrical conductive vias. The connecting pattern is disposed on the passivation layer and connects the first electrical conductive vias and the thermal conductive vias. The thermal conductive vias are connected to the first pads through the connecting pattern and the first electrical conductive vias.

公开(公告)号：US11574857B2

公开(公告)日：2023-02-07

申请号：US16827595

申请日：2020-03-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Feng Yang ,  Hsin-Yu Pan ,  Kai-Chiang Wu ,  Chien-Chang Lin

IPC: H01L23/498 ,  H01L21/52 ,  H01L23/16 ,  H01L21/48 ,  H01L25/18

Abstract: A semiconductor package includes a circuit board structure, a redistribution layer structure, a package structure, and a ring structure. The redistribution layer structure has a first region and a second region surrounding the first region. The redistribution layer structure is disposed over and electrically connected to the circuit board structure. A metal density in the second region is greater than a metal density in the first region. The package structure is disposed over the first region of the redistribution layer structure. The package structure is electrically connected to the redistribution layer structure. The ring structure is disposed over the second region of the redistribution layer structure.

公开(公告)号：US11145639B2

公开(公告)日：2021-10-12

申请号：US16718034

申请日：2019-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Wei Cheng ,  Chien-Hsun Lee ,  Chi-Yang Yu ,  Hao-Cheng Hou ,  Hsin-Yu Pan ,  Tsung-Ding Wang

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/538 ,  H01L23/367 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498 ,  H01L25/00

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor device, at least one second semiconductor device, at least one dummy die, an encapsulant and a redistribution structure. The first semiconductor device, the at least one second semiconductor device and at least one dummy die are laterally separated from one another, and laterally encapsulated by the encapsulant. A Young's modulus of the at least one dummy die is greater than a Young's modulus of the encapsulant. A sidewall of the at least one dummy die is substantially coplanar with a sidewall of the encapsulant. The redistribution structure is disposed over the encapsulant, and electrically connected to the first semiconductor device and the at least one second semiconductor device.

公开(公告)号：US20210183844A1

公开(公告)日：2021-06-17

申请号：US16718034

申请日：2019-12-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jung-Wei Cheng ,  Chien-Hsun Lee ,  Chi-Yang Yu ,  Hao-Cheng Hou ,  Hsin-Yu Pan ,  Tsung-Ding Wang

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/538 ,  H01L23/367 ,  H01L21/56 ,  H01L25/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor device, at least one second semiconductor device, at least one dummy die, an encapsulant and a redistribution structure. The first semiconductor device, the at least one second semiconductor device and at least one dummy die are laterally separated from one another, and laterally encapsulated by the encapsulant. A Young's modulus of the at least one dummy die is greater than a Young's modulus of the encapsulant. A sidewall of the at least one dummy die is substantially coplanar with a sidewall of the encapsulant. The redistribution structure is disposed over the encapsulant, and electrically connected to the first semiconductor device and the at least one second semiconductor device.