公开(公告)号：US08367496B2

公开(公告)日：2013-02-05

申请号：US13099790

申请日：2011-05-03

申请人： Takashi Ando ,  Changhwan Choi ,  Martin M. Frank ,  Vijay Narayanan

发明人： Takashi Ando ,  Changhwan Choi ,  Martin M. Frank ,  Vijay Narayanan

IPC分类号： H01L21/8238

CPC分类号： H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

摘要： A stack of a high-k gate dielectric and a metal gate structure includes a lower metal layer, a scavenging metal layer, and an upper metal layer. The scavenging metal layer meets the following two criteria 1) a metal (M) for which the Gibbs free energy change of the reaction Si+2/y MxOy→2x/y M+SiO2 is positive 2) a metal that has a more negative Gibbs free energy per oxygen atom for formation of oxide than the material of the lower metal layer and the material of the upper metal layer. The scavenging metal layer meeting these criteria captures oxygen atoms as the oxygen atoms diffuse through the gate electrode toward the high-k gate dielectric. In addition, the scavenging metal layer remotely reduces the thickness of a silicon oxide interfacial layer underneath the high-k dielectric. As a result, the equivalent oxide thickness (EOT) of the total gate dielectric is reduced and the field effect transistor maintains a constant threshold voltage even after high temperature processes during CMOS integration.

摘要翻译： 高k栅极电介质和金属栅极结构的堆叠包括下部金属层，清除金属层和上部金属层。 清除金属层满足以下两个标准：1）反应Si + 2 / y MxOy→2x / y M + SiO2的吉布斯自由能变化为正的金属（M）2）具有更负的金属 每个氧原子吉布斯自由能用于形成氧化物，而不是下金属层的材料和上金属层的材料。 符合这些标准的清除金属层随着氧原子通过栅电极向高k栅极电介质扩散而捕获氧原子。 此外，清除金属层远远地降低了高k电介质下面的氧化硅界面层的厚度。 结果，即使在CMOS积分期间的高温处理之后，总栅极电介质的等效氧化物厚度（EOT）减小，并且场效应晶体管保持恒定的阈值电压。

公开(公告)号：US08853413B2

公开(公告)日：2014-10-07

申请号：US13266671

申请日：2010-05-12

申请人： Yoshimasa Fukuda ,  Takashi Ando ,  Kimihiko Goto ,  Nozomu Nakanishi ,  Takashi Watanabe ,  Kenichi Kurihara ,  Nobuto Minowa ,  Masaaki Mitomi

发明人： Yoshimasa Fukuda ,  Takashi Ando ,  Kimihiko Goto ,  Nozomu Nakanishi ,  Takashi Watanabe ,  Kenichi Kurihara ,  Nobuto Minowa ,  Masaaki Mitomi

IPC分类号： C07D401/04

CPC分类号： C07D493/04

摘要： Disclosed is a process for efficiently producing pyripyropene derivatives having acyloxy at the 1-position and 11-position and hydroxyl at the 7-position. The process comprises selectively acylating hydroxyl at the 1-position and 11-position of a compound represented by formula B1 through one to three steps with an acylating agent in the presence or absence of a base.

公开(公告)号：US08786030B2

公开(公告)日：2014-07-22

申请号：US13570388

申请日：2012-08-09

申请人： Takashi Ando ,  Kisik Choi ,  Vijay Narayanan ,  Tenko Yamashita ,  Junli Wang

发明人： Takashi Ando ,  Kisik Choi ,  Vijay Narayanan ,  Tenko Yamashita ,  Junli Wang

IPC分类号： H01L21/02

CPC分类号： H01L29/517 ,  H01L21/28079 ,  H01L21/28088 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545

摘要： A quarter-gap p-type field effect transistor (PFET) formed by gate-last fabrication includes a gate stack formed on a silicon substrate, the gate stack including: a high-k dielectric layer located on the silicon substrate; and a gate metal layer located over the high-k dielectric layer, the gate metal layer including titanium nitride and having a thickness of about 20 angstroms; and a metal contact formed over the gate stack. A quarter-gap n-type field effect transistor (NFET) formed by gate-last fabrication includes a gate stack formed on a silicon substrate, the gate stack including: a high-k dielectric layer located on the silicon substrate; and a first gate metal layer located over the high-k dielectric layer, the first gate metal layer including titanium nitride; and a metal contact formed over the gate stack.

摘要翻译： 通过栅极最终制造形成的四分之一间隙p型场效应晶体管（PFET）包括形成在硅衬底上的栅极堆叠，所述栅极堆叠包括：位于硅衬底上的高k电介质层; 以及位于高k电介质层上方的栅极金属层，所述栅极金属层包括氮化钛并且具有约20埃的厚度; 以及形成在栅极堆叠上的金属接触。 通过栅极最后制造形成的四分之一间隙n型场效应晶体管（NFET）包括形成在硅衬底上的栅极堆叠，该栅极堆叠包括：位于硅衬底上的高k电介质层; 以及位于所述高k电介质层上方的第一栅极金属层，所述第一栅极金属层包括氮化钛; 以及形成在栅极堆叠上的金属接触。

公开(公告)号：US08740506B2

公开(公告)日：2014-06-03

申请号：US13033253

申请日：2011-02-23

申请人： Shogo Ogaki ,  Takashi Ando ,  Masaru Inoue ,  Takeshi Shimoda

发明人： Shogo Ogaki ,  Takashi Ando ,  Masaru Inoue ,  Takeshi Shimoda

IPC分类号： B65G51/20

CPC分类号： B65G51/03 ,  B65G47/525 ,  H01L41/25

摘要： A positioning apparatus includes a stage on which a piezoelectric element is set, a stop unit having a stop face to which the piezoelectric element set on the stage is pushed so that the piezoelectric element is positioned at a target position corresponding to an attaching part of, for example, a head suspension to which the piezoelectric element is attached, and a pushing unit to push the piezoelectric element toward the stop face, the pushing unit blowing a gas to push the piezoelectric element. The positioning apparatus is capable of correctly positioning the piezoelectric element to the target position without damaging the piezoelectric element.

摘要翻译： 一种定位装置，包括设置有压电元件的台，具有止动面的停止单元，所述停止面被压入到设置在所述台上的所述压电元件，使得所述压电元件位于对应于所述平台的安装部的目标位置， 例如，安装有压电元件的磁头悬架以及将压电元件朝向止动面推压的推压单元，推压单元吹出气体来推压压电元件。 定位装置能够将压电元件正确地定位到目标位置而不损坏压电元件。

公开(公告)号：US08647972B1

公开(公告)日：2014-02-11

申请号：US13618255

申请日：2012-09-14

申请人： Takashi Ando ,  Aritra Dasgupta ,  Unoh Kwon ,  Sean M. Polvino

发明人： Takashi Ando ,  Aritra Dasgupta ,  Unoh Kwon ,  Sean M. Polvino

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66795

摘要： Embodiments relate to a field-effect transistor (FET) replacement gate apparatus. The apparatus includes one or more of a substrate and insulator including a base and side walls defining a trench. A high-dielectric constant (high-k) layer is formed on the base and side walls of the trench. The high-k layer has an upper surface conforming to a shape of the trench. A first layer is formed on the high-k layer and conforms to the shape of the trench. The first layer includes an aluminum-free metal nitride. A second layer is formed on the first layer and conforms to the shape of the trench. The second layer includes aluminum and at least one other metal. A third layer is formed on the second layer and conforms to the shape of the trench. The third layer includes aluminum-free metal nitride.

摘要翻译： 实施例涉及场效应晶体管（FET）替换门装置。 该装置包括一个或多个衬底和绝缘体，其包括限定沟槽的基底和侧壁。 在沟槽的底壁和侧壁上形成高介电常数（高k）层。 高k层具有与沟槽形状一致的上表面。 第一层形成在高k层上并符合沟槽的形状。 第一层包括无铝的金属氮化物。 在第一层上形成第二层并符合沟槽的形状。 第二层包括铝和至少一种其他金属。 第三层形成在第二层上并符合沟槽的形状。 第三层包括无铝金属氮化物。

公开(公告)号：US20140008986A1

公开(公告)日：2014-01-09

申请号：US14006905

申请日：2012-03-16

申请人： Taku Miyauchi ,  Takashi Ando

发明人： Taku Miyauchi ,  Takashi Ando

IPC分类号： H02J1/10

CPC分类号： H02J1/102 ,  H02J3/383 ,  H02M3/1584 ,  H02M2001/007 ,  Y02E10/563 ,  Y10T307/707

摘要： In the present invention, first boosting circuits (41a to 41d) are interposed upon each of direct current power lines (La to Ld). The boosting ratios of the first boosting circuits (41a to 41d), for each iteration of a first cycle, are variably controlled during a first period so that the generated power of the corresponding solar cell strings (1a to 1d) is maximized, and the boosting ratios during a second period are controlled so as to be maintained at a uniform value. The total amount of time of the first period and the second period is made to correspond to the first cycle.

摘要翻译： 在本发明中，第一升压电路（41a〜41d）被插入到每条直流电力线（La〜Ld）上。 对于第一周期的每次迭代，第一升压电路（41a至41d）的升压比在第一时段期间被可变地控制，使得对应的太阳能电池串（1a至1d）的发电功率最大化，并且 控制第二期间的升压比，以保持均匀的值。 第一周期和第二周期的总时间量对应于第一周期。

公开(公告)号：US20140008983A1

公开(公告)日：2014-01-09

申请号：US14006494

申请日：2012-03-16

申请人： Taku Miyauchi ,  Takashi Ando

发明人： Taku Miyauchi ,  Takashi Ando

IPC分类号： H02J3/18

CPC分类号： H02J3/18 ,  H01L31/02021 ,  H02J1/102 ,  H02J3/385 ,  H02M2001/007 ,  Y02E10/58 ,  Y10T307/549

摘要： A current collection box includes: a number of terminals enabling the connecting of at least two solar cell strings including a plurality of solar cells are connected in series; a booster for boosting individual voltages of the generated power of each of the solar cell strings inputted via the terminals; and an output circuit for collecting all of the outputs of the booster together into a single output and then outputting the single output, wherein each of the boosters starts MPPT operation, which operates so that the output power of the solar cells is controlled so as to reach a maximum value, with different periods.

摘要翻译： 电流收集箱包括：串联连接多个太阳能电池组的至少两个太阳能电池串的多个端子; 用于升压通过端子输入的每个太阳能电池串的发电功率的单独电压的升压器; 以及输出电路，用于将所述升压器的所有输出一起汇集成单个输出，然后输出单个输出，其中每个升压器开始MPPT操作，其操作使得太阳能电池的输出功率被控制为 达到最大值，具有不同的周期。

公开(公告)号：US08583018B2

公开(公告)日：2013-11-12

申请号：US13373238

申请日：2011-11-09

申请人： Takashi Ando

发明人： Takashi Ando

IPC分类号： G03G15/20

CPC分类号： G03G15/2032

摘要： A fusing device includes a fusing roller, a compression roller, and a cam; a first link having an end as a rotation support point, another end with a contact point with the cam, and an intermediate point between the end and another end thereof; a second link having a first end, a second end, and a third end, the first end rotatably connected to the intermediate point of the first link, and the second end configured to rotatably support the compression roller; a third link having an end rotatably supported and another end rotatably connected to the third end of the second link; and an elastic compression member configured to elastically compress the compression roller against the fusing roller via the first link.

摘要翻译： 定影装置包括定影辊，压缩辊和凸轮; 具有端部作为旋转支撑点的第一连杆，具有与凸轮的接触点的另一端以及其端部和另一端之间的中间点; 具有第一端，第二端和第三端的第二连杆，所述第一端可旋转地连接到所述第一连杆的中间点，所述第二端构造成可旋转地支撑所述压缩辊; 具有可旋转地支撑的端部的第三连杆和可旋转地连接到第二连杆的第三端的另一端; 以及弹性压缩构件，其经由所述第一连杆将所述压缩辊弹性地压靠所述定影辊。

公开(公告)号：US20130222664A1

公开(公告)日：2013-08-29

申请号：US13777378

申请日：2013-02-26

申请人： Masafumi TAKAHASHI ,  Takashi Ando

发明人： Masafumi TAKAHASHI ,  Takashi Ando

IPC分类号： H04N5/225

CPC分类号： H04N5/2328 ,  G03B2205/0038 ,  H04N5/2254 ,  H04N5/23287

摘要： Provided in an image pickup apparatus are an imaging optical system (12), an image pickup element (22), a fixed member (22) whose position relative to the imaging optical axis OA is fixed, a plurality of movable supporting balls (62), each movably supported with attraction of magnetic force, a movable member (41) in which the image pickup element is provided and which is movably supported by the fixed member with magnetic force through each movable supporting ball (62), a driving mechanism (44, 46, 54, 55, 56, 57) to generate driving force to relatively move the movable member with respect to the fixed member, a display unit (18), a mounting plate to mount the display unit in the casing (11), wherein the mounting plate (70) is provided with a protruding arm portion (74) protruding toward the movable member.

摘要翻译： 在图像拾取装置中设置有成像光学系统（12），相对于成像光轴OA的位置固定的摄像元件（22），固定部件（22），多个可动支撑球（62） ，每个都可移动地受到磁力的吸引力;可移动构件（41），其中设置有图像拾取元件，并且通过每个可移动支撑球（62）以磁力可动地由固定构件支撑，驱动机构（44） 以产生相对于固定构件相对移动可动构件的驱动力，显示单元（18），将显示单元安装在壳体（11）中的安装板， 其中所述安装板（70）设置有朝向所述可动构件突出的突出臂部（74）。

公开(公告)号：US20130161763A1

公开(公告)日：2013-06-27

申请号：US13332991

申请日：2011-12-21

申请人： Takashi Ando ,  Huiming Bu ,  Ramachandra Divakaruni ,  Bruce B. Doris ,  Chung-Hsun Lin ,  Huiling Shang ,  Tenko Yamashita

发明人： Takashi Ando ,  Huiming Bu ,  Ramachandra Divakaruni ,  Bruce B. Doris ,  Chung-Hsun Lin ,  Huiling Shang ,  Tenko Yamashita

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7833 ,  H01L21/26506 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/268 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6653 ,  H01L29/66537 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/78621

摘要： A method includes forming on a surface of a semiconductor a dummy gate structure comprised of a plug; forming a first spacer surrounding the plug, the first spacer being a sacrificial spacer; and performing an angled ion implant so as to implant a dopant species into the surface of the semiconductor adjacent to an outer sidewall of the first spacer to form a source extension region and a drain extension region, where the implanted dopant species extends under the outer sidewall of the first spacer by an amount that is a function of the angle of the ion implant. The method further includes performing a laser anneal to activate the source extension and the drain extension implant. The method further includes forming a second spacer surrounding the first spacer, removing the first spacer and the plug to form an opening, and depositing a gate stack in the opening.

摘要翻译： 一种方法包括在半导体的表面上形成由插头构成的虚拟栅极结构; 形成围绕所述插塞的第一间隔件，所述第一间隔件是牺牲间隔件; 以及执行成角度的离子注入，以便将掺杂剂物质注入与所述第一间隔物的外侧壁相邻的所述半导体的表面中，以形成源延伸区域和漏极延伸区域，其中所述注入的掺杂剂物质在所述外侧壁 的第一间隔物的量是离子注入的角度的函数。 该方法还包括执行激光退火以激活源延伸和漏极延伸植入。 该方法还包括形成围绕第一间隔件的第二间隔件，去除第一间隔件和插塞以形成开口，以及在开口中沉积栅极堆叠。