公开(公告)号：US07812752B2

公开(公告)日：2010-10-12

申请号：US12289266

申请日：2008-10-23

申请人： Hiroshi Tsuchi ,  Noboru Okuzono

发明人： Hiroshi Tsuchi ,  Noboru Okuzono

IPC分类号： H03M1/66

CPC分类号： G09G3/3688 ,  G09G2310/027 ,  H03M1/661 ,  H03M1/68 ,  H03M1/76

摘要： A digital-to-analog converter circuit includes: a first subdecoder for receiving a first reference voltage group and selecting a reference voltage Vrk based upon an input digital signal; a second subdecoder for receiving a second reference voltage group and selecting a reference voltage Vr(k+1) based upon the input digital signal; a third subdecoder for receiving a third reference voltage group and selecting a reference voltage Vr(k+2) based upon the input digital signal; a fourth subdecoder for receiving the reference voltages that have been selected by respective ones of the first to third subdecoders, selecting two of these reference voltages (inclusive of selecting the same voltage redundantly) based upon an input digital signal, and outputting the selected two reference voltages; and an amplifier circuit for receiving the two reference voltages that have been selected by the fourth subdecoder and outputting a result of an operation applied to the two reference voltages.

摘要翻译： 数模转换器电路包括：第一子编码器，用于接收第一参考电压组并基于输入数字信号选择参考电压Vrk; 第二子编码器，用于接收第二参考电压组，并且基于所输入的数字信号选择参考电压Vr（k + 1）; 第三子编码器，用于接收第三参考电压组，并且基于所输入的数字信号选择参考电压Vr（k + 2）; 第四子编码器，用于接收由第一至第三子解码器中的相应的子编码器选择的参考电压，基于输入的数字信号选择这些参考电压中的两个（包括冗余选择相同的电压），并输出所选择的两个参考 电压; 以及放大器电路，用于接收由第四子解码器选择的两个参考电压并输出施加于两个参考电压的操作结果。

公开(公告)号：US20100052966A1

公开(公告)日：2010-03-04

申请号：US12616459

申请日：2009-11-11

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03M1/78

CPC分类号： H03F3/45179 ,  H03F2203/45504 ,  H03F2203/45521 ,  H03F2203/45616

摘要： Disclosed is a differential amplifier which includes first and second input terminals, an output terminal, first and second differential pairs, and first and second current sources for supplying currents to the first and second differential pairs. The first differential pair has first and second inputs of an input pair connected to the first input terminal and the output terminal, respectively. The second differential pair has first and second inputs of an input pair connected to the second input terminal the output terminal, respectively. The differential amplifier further includes a load circuit connected to output pairs of the first and second differential pairs for outputting a signal obtained on combining outputs of the first and second differential pairs from at least one of a pair of connection nodes between the output pairs of the first and second differential pairs and the load circuit, an amplifier stage supplied with at least one signal at a connection node of the output pairs of the first and second differential pairs and the load circuit to output a voltage at the output terminal, and a current control circuit controlling the first and second current sources for controlling the ratio of currents supplied to the first and second differential pairs.

摘要翻译： 公开了一种差分放大器，其包括第一和第二输入端子，输出端子，第一和第二差分对以及用于向第一和第二差分对提供电流的第一和第二电流源。 第一差分对具有分别连接到第一输入端和输出端的输入对的第一和第二输入。 第二差分对分别具有连接到第二输入端子和输出端子的输入对的第一和第二输入端。 所述差分放大器还包括连接到所述第一和第二差分对的输出对的负载电路，用于输出在所述第一和第二差分对的输出对之间的一对连接节点中的至少一个上组合所述第一和第二差分对的输出而获得的信号 第一和第二差分对和负载电路，在第一和第二差分对的输出对和负载电路的连接节点处提供至少一个信号的放大器级，以在输出端输出电压，以及电流 控制电路控制第一和第二电流源，以控制提供给第一和第二差分对的电流比。

公开(公告)号：US07623054B2

公开(公告)日：2009-11-24

申请号：US11526636

申请日：2006-09-26

申请人： Masao Iriguchi ,  Hiroshi Tsuchi

发明人： Masao Iriguchi ,  Hiroshi Tsuchi

IPC分类号： H03M1/66

CPC分类号： H03F3/45183 ,  G09G3/3688 ,  G09G2310/027 ,  H03F2203/45616 ,  H03F2203/45631 ,  H03F2203/45656 ,  H03F2203/45682 ,  H03F2203/45728 ,  H03M1/765

摘要： Disclosed is a differential amplifier of a multi-level output type comprising a load circuit including a diode-connected first transistor with a source thereof connected to a power supply and a second transistor with a source thereof connected to the power supply and connected to a gate of the first transistor through a capacitor, a differential pair including a third transistor and a fourth transistor with sources thereof connected in common and drains thereof connected to drains of the first and second transistors, respectively, a current source for supplying a current to the differential pair, a first switch connected between a gate of the second transistor and a drain of the fourth transistor, an amplifier with an input thereof connected to a drain of the second transistor and an output thereof connected to an output terminal, a second switch connected between a gate of the fourth transistor and a first input terminal, a third switch connected between the gate of the fourth transistor and a third input terminal, a fourth switch connected between a gate of the third transistor and a second input terminal, and a fifth switch connected between the gate of the third transistor and the output terminal. Switching control between a first state where the first, second and fourth switches are turned on and the third and fifth switches are turned off and a second state where the first and second fourth switches are turned off and the third and fifth switches are turned on is performed.

摘要翻译： 公开了一种多电平输出型的差分放大器，包括负载电路，负载电路包括二极管连接的第一晶体管，其源极连接到电源，第二晶体管的源极连接到电源并连接到栅极 第一晶体管通过电容器，差分对包括第三晶体管和第四晶体管，其源极分别连接到第一和第二晶体管的漏极，电流源分别连接到第一和第二晶体管的漏极，电流源用于向差分 连接在第二晶体管的栅极和第四晶体管的漏极之间的第一开关，放大器，其输入连接到第二晶体管的漏极，其输出连接到输出端子，第二开关连接在 第四晶体管的栅极和第一输入端子，连接在第四晶体管的栅极之间的第三开关 tor和第三输入端，连接在第三晶体管的栅极和第二输入端之间的第四开关，以及连接在第三晶体管的栅极和输出端之间的第五开关。 在第一，第二和第四开关导通的第一状态和第三和第五开关之间的开关控制被关断，而第一和第二第四开关被断开，第三和第五开关导通的第二状态是 执行。

公开(公告)号：US07619445B2

公开(公告)日：2009-11-17

申请号：US12166098

申请日：2008-07-01

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03K19/0175

CPC分类号： G09G3/3685 ,  G09G2310/027 ,  G09G2310/0291 ,  H03M1/0682 ,  H03M1/765

摘要： A differential amplifier includes a first differential pair, a second differential pair, a load circuit, connected in common to the first and second differential pairs, and first and second current sources for supplying the current to the first and second differential pairs, and amplifies a signal responsive to a common output signal of the first and second differential pairs. One of differential inputs of the first differential pair is connected to a reference voltage. A data output period includes a first period and a second period. During the first period, voltages of first and second input terminals are input through first and fourth switches in the on-state to differential inputs of the second differential pair. The other of the differential inputs of the first differential pair is connected through a third switch in the on-state to an output terminal. An output voltage is stored in a capacitor C connected to the other differential input of the first differential pair. The first, third and fourth switches are turned off during the second period. One of the differential inputs of the second differential pair is connected through a second switch to the output terminal. The other differential input of the second differential pair is connected through a fifth switch to a third input terminal.

摘要翻译： 差分放大器包括第一差分对，第二差分对，负载电路，共同连接到第一和第二差分对，以及第一和第二电流源，用于将电流提供给第一和第二差分对，并且放大一个 响应于第一和第二差分对的公共输出信号的信号。 第一差分对的差分输入之一连接到参考电压。 数据输出周期包括第一周期和第二周期。 在第一时段期间，第一和第二输入端的电压通过导通状态的第一和第四开关输入到第二差分对的差分输入。 第一差分对的另一个差分输入通过导通状态的第三开关连接到输出端。 输出电压存储在连接到第一差分对的另一个差分输入的电容器C中。 在第二时段期间，第一，第三和第四开关被关断。 第二差分对的差分输入之一通过第二开关连接到输出端。 第二差分对的另一差分输入通过第五开关连接到第三输入端。

公开(公告)号：US07586504B2

公开(公告)日：2009-09-08

申请号：US11294605

申请日：2005-12-06

申请人： Yoshihiko Nakahira ,  Hiroshi Tsuchi

发明人： Yoshihiko Nakahira ,  Hiroshi Tsuchi

IPC分类号： G09G3/36 ,  G09G5/10

CPC分类号： G09G3/3696 ,  G09G3/3208 ,  G09G3/3225 ,  G09G3/3291 ,  G09G3/3648 ,  G09G2300/0842 ,  H03F3/45753 ,  H03F3/45977

摘要： To obtain an amplifier circuit capable of realizing low power consumption and high-precision output. A controlling unit controls each switch of an offset correction circuit to select one capacitor associated with a voltage level of an input signal selected by an input signal selection unit, have an offset voltage of an operational amplifier generated according to the voltage level of the input signal stored by the selected capacitor, and correct an output of the operational amplifier by using the offset voltage held by the selected capacitor.

摘要翻译： 获得能够实现低功耗和高精度输出的放大器电路。 控制单元控制偏移校正电路的每个开关以选择与由输入信号选择单元选择的输入信号的电压电平相关联的一个电容器，具有根据输入信号的电压电平产生的运算放大器的偏移电压 由所选择的电容器存储，并且通过使用由所选择的电容器保持的偏移电压来校正运算放大器的输出。

公开(公告)号：US20090213051A1

公开(公告)日：2009-08-27

申请号：US12320831

申请日：2009-02-05

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： G09G3/36 ,  H03M1/66

CPC分类号： H03M1/661 ,  G09G3/3648 ,  G09G3/3685 ,  H03M1/76

摘要： Disclosed is a digital-to-analog converting circuit (DAC) which in accordance with an m-bit digital signal, selects two reference voltages, inclusive of redundant selection of the same reference voltage (inclusive also of reference voltages other than adjacent voltages) out of a plurality of reference voltages and outputs a voltage level that is the result of interpolation from the two reference voltages. The plurality of reference voltages are grouped into first to (3S+1)th reference voltage groups (where S is an integer that is a power of 2). An ith reference voltage group [where i is 1 to (3S+1)] includes [3S×(j−1)+i]th reference voltages (where j=1, 2, . . . h, and h is a prescribed integer). The DAC has a decoder and an interpolation amplifier. The decoder includes first to (3S+1)th subdecoders provided in correspondence with the first to (3S+1)th reference voltage groups for selecting one reference voltage out of the plurality of reference voltages of respective ones of the corresponding reference voltage groups in accordance with values of a first bit group on a higher order side of the input digital signal; and a (3S+1)-input and 2-output subdecoder for selecting two reference voltages, inclusive of redundant selection of the same reference voltage, out of (3S+1) reference voltages selected by the respective first to (3S+1)th subdecoders, in accordance with values of a second bit group on a lower order side of the input digital signal, and outputting the selected two reference voltages. The interpolation amplifier outputs a voltage level obtained by interpolating the two reference voltages with an interpolation ratio 1:1.

摘要翻译： 公开了一种数模转换电路（DAC），其根据m位数字信号选择两个参考电压，包括相同参考电压（包括除了相邻电压以外的参考电压）的冗余选择 的多个参考电压，并且从两个参考电压输出作为内插结果的电压电平。 多个参考电压被分组为第一到第（3S + 1）个参考电压组（其中S是2的幂的整数）。 第i参考电压组[其中i为1至（3S + 1）]包括[3Sx（j-1）+ i]个参考电压（其中j = 1,2，...，h，h为规定的整数 ）。 DAC具有解码器和内插放大器。 解码器包括与第一至第（3S + 1）个参考电压组相对应地设置的第一至第（3S + 1）个子代码器，用于从相应的参考电压组中的相应参考电压组的多个参考电压中选择一个参考电压 根据输入数字信号的高阶侧的第一位组的值; 和（3S + 1）输入和2输出子编码器，用于选择两个参考电压，包括相同参考电压的冗余选择，由（3S + 1）个参考电压分别由第一至第（3S + 1） 根据输入数字信号的低级侧上的第二位组的值，并输出所选择的两个参考电压。 内插放大器以插值比1：1输出通过内插两个参考电压而获得的电压电平。

公开(公告)号：US20090195291A1

公开(公告)日：2009-08-06

申请号：US12320778

申请日：2009-02-04

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03L5/00

CPC分类号： H03K19/018521 ,  G09G3/20 ,  G09G3/3208 ,  G09G3/3611 ,  G09G2310/0289 ,  H03K19/0013 ,  H03K19/01707

摘要： Disclosed is a level shift circuit that includes a first level shifter which is connected between an output terminal and a first power supply terminal that supplies a first voltage and sets the output terminal to a level of the first voltage when an input signal received at an input terminal assumes a first value; a second level shifter which is connected between the output terminal and a second power supply terminal that supplies a second voltage and sets the output terminal to a level of the second voltage when the input signal assumes a complementary value of the first value; and a feedback control unit that performs control of deactivating the first level shifter during a predetermined time interval including a point of time when the input signal is supplied when it is detected that the output terminal immediately before the input signal is received at the input terminal assumes the first voltage level. When the input signal supplied in the predetermined time interval assumes a value that sets the output terminal to the second voltage level, the second level shifter sets the output terminal to the second voltage level with the first level shifter deactivated.

摘要翻译： 公开了一种电平移位电路，其包括第一电平移位器，其连接在输出端子和提供第一电压的第一电源端子之间，并且当在输入端接收的输入信号时将输出端子设置为第一电压的电平 终端假设第一个值; 第二电平移位器，连接在输出端和提供第二电压的第二电源端之间，当输入信号呈现第一值的互补值时，将输出端设置为第二电压的电平; 以及反馈控制单元，其在包括当检测到在输入端子处接收到输入信号之前的输出端子被假定时提供输入信号的时间点的预定时间间隔期间，执行停用第一电平移位器的控制， 第一个电压电平。 当在预定时间间隔内提供的输入信号采取将输出端子设置为第二电压电平的值时，第二电平移位器将第一电平移位器的输出端子设置为第二电压电平。

公开(公告)号：US07495512B2

公开(公告)日：2009-02-24

申请号：US11638535

申请日：2006-12-14

申请人： Hiroshi Tsuchi

发明人： Hiroshi Tsuchi

IPC分类号： H03F3/45 ,  G09G5/10

CPC分类号： H03F3/45192 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2203/45116 ,  H03F2203/45166 ,  H03F2203/45171 ,  H03F2203/45236 ,  H03F2203/45281 ,  H03F2203/45641

摘要： A differential amplifying circuit capable of reducing amplitude-difference deviation over a full range of grayscale voltages inclusive of voltages in the vicinity of power-supply voltage includes first and second differential pairs of mutually different polarities, in which the outputs of the differential pairs are coupled by a coupling stage. One of the first and second differential pairs receives an input signal from an input terminal and a feedback signal from an output terminal at a pair of inputs thereof, and the other differential pair receives reference signals (which may be of the same voltage), which have voltage levels that set the other differential pair transistors to an on-state, at a pair of inputs of the other differential pair.

摘要翻译： 能够减小包括电源电压附近的电压的全范围灰度级电压的差分偏差的差分放大电路包括相互不同极性的第一和第二差分对，其中差分对的输出耦合 通过耦合阶段。 第一和第二差分对之一接收来自输入端的输入信号和来自其输入端的输出端的反馈信号，另一个差分对接收参考信号（其可以是相同的电压），其中 具有在另一个差分对的一对输入处将另一个差分对晶体管设置为导通状态的电压电平。

公开(公告)号：US20080143658A1

公开(公告)日：2008-06-19

申请号：US11979714

申请日：2007-11-07

申请人： Junichiro Ishii ,  Hiroshi Tsuchi

发明人： Junichiro Ishii ,  Hiroshi Tsuchi

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011 ,  G09G2310/027 ,  Y10T307/74 ,  Y10T307/747

摘要： Disclosed is an output circuit including a connection switch and an operation unit. The connection switch receives first and second voltages from first and second terminals, respectively, selects and outputs the first voltage or the second voltage for first to third intermediate terminals, including selection of the same voltage and switches assignment of the first and second voltages to the first to third intermediate terminals responsive to a connection switching signal. The operation unit receives the voltages assigned to the first to third intermediate terminals and outputs to an output terminal a voltage obtained by performing a predetermined operation on the voltages.

摘要翻译： 公开了一种包括连接开关和操作单元的输出电路。 连接开关分别接收来自第一和第二端子的第一和第二电压，选择并输出第一至第三中间端子的第一电压或第二电压，包括选择相同的电压，并将第一和第二电压的分配切换到 响应于连接切换信号的第一到第三中间终端。 操作单元接收分配给第一至第三中间端子的电压，并向输出端子输出通过对电压执行预定操作而获得的电压。

公开(公告)号：US07342449B2

公开(公告)日：2008-03-11

申请号：US11197635

申请日：2005-08-04

申请人： Jun-ichirou Ishii ,  Hiroshi Tsuchi

发明人： Jun-ichirou Ishii ,  Hiroshi Tsuchi

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/72

摘要： Disclosed is a Rail-to-Rail amplifier including a plurality of differential pairs of a first conductivity type and a plurality of differential amplifiers of a second conductivity type each with one of an input pair thereof constituting an input terminal, a differential amplifier that outputs an output voltage according to the range of provided supply voltage, a determination unit for determining whether to stop operations of the differential pairs of the first conductivity type or the second conductivity type according to a predetermined input signal, and a differential pair control unit for stopping the operations of the differential pairs of the first conductivity type or the second conductivity type according to the output signal of the determination unit.

摘要翻译： 公开了一种轨至轨放大器，其包括多个第一导电类型的差分对和多个第二导电类型的差分放大器，每个差分放大器的输入对之一构成输入端，差分放大器输出 根据提供的电源电压的范围的输出电压;确定单元，用于根据预定输入信号确定是否停止第一导电类型或第二导电类型的差分对的操作;以及差分对控制单元，用于停止 根据确定单元的输出信号对第一导电类型或第二导电类型的差分对进行操作。