公开(公告)号：US20100120225A1

公开(公告)日：2010-05-13

申请号：US12692768

申请日：2010-01-25

申请人： Tetsuya KAKEHATA ,  Kazutaka KURIKI

发明人： Tetsuya KAKEHATA ,  Kazutaka KURIKI

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  Y10S438/977

摘要： An object is to reduce occurrence of defective bonding between a base substrate and a semiconductor substrate even when a silicon nitride film or the like is used as a bonding layer. Another object is to provide a method for manufacturing an SOI substrate by which an increase in the number of steps can be suppressed. A semiconductor substrate and a base substrate are prepared; an oxide film is formed over the semiconductor substrate; the semiconductor substrate is irradiated with accelerated ions through the oxide film to form a separation layer at a predetermined depth from a surface of the semiconductor substrate; a nitrogen-containing layer is formed over the oxide film after the ion irradiation; the semiconductor substrate and the base substrate are disposed opposite to each other to bond a surface of the nitrogen-containing layer and a surface of the base substrate to each other; and the semiconductor substrate is heated to cause separation along the separation layer, thereby forming a single crystal semiconductor layer over the base substrate with the oxide film and the nitrogen-containing layer interposed therebetween.

摘要翻译： 即使在使用氮化硅膜等作为接合层的情况下，也可以减少基底基板与半导体基板之间的不良接合的发生。 另一个目的是提供一种用于制造可以抑制步数增加的SOI衬底的方法。 制备半导体衬底和基底衬底; 在半导体衬底上形成氧化膜; 半导体衬底通过氧化膜被加速离子照射，以在半导体衬底的表面的预定深度处形成分离层; 在离子照射之后在氧化膜上方形成含氮层; 半导体衬底和基底衬底彼此相对设置，以将氮含量层的表面和基底衬底的表面彼此粘合; 并且半导体衬底被加热以沿着分离层分离，从而在氧化膜和含氮层之间形成在基底衬底上的单晶半导体层。

公开(公告)号：US20090203176A1

公开(公告)日：2009-08-13

申请号：US12190059

申请日：2008-08-12

申请人： Tetsuya KAKEHATA

发明人： Tetsuya KAKEHATA

IPC分类号： H01L21/336

CPC分类号： H01L21/76254 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1266 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78675

摘要： To suppress generation of dangling bonds, the present invention relates to a method for manufacturing a semiconductor device including the steps of: forming a semiconductor film; forming a gate insulating film and a gate electrode over the semiconductor film; forming an impurity region in the semiconductor film by addition of an impurity element having one conductivity type thereto; forming an insulating film containing fluorine with the semiconductor film, the gate insulating film, and the gate electrode covered therewith; heating the semiconductor film and the insulating film containing fluorine; and forming a wiring, which is electrically connected to the impurity region, over the insulating film containing fluorine. The insulating film containing fluorine is any one of a silicon oxide film containing fluorine, a silicon oxide film containing fluorine and nitrogen, or a silicon nitride film containing fluorine.

摘要翻译： 为了抑制悬挂键的产生，本发明涉及一种半导体器件的制造方法，包括以下步骤：形成半导体膜; 在半导体膜上形成栅极绝缘膜和栅电极; 通过添加具有一种导电类型的杂质元素在半导体膜中形成杂质区域; 用所述半导体膜，所述栅极绝缘膜和所述栅极电极形成包含氟的绝缘膜; 加热半导体膜和含氟的绝缘膜; 并且在含氟的绝缘膜上形成与杂质区电连接的布线。 含氟的绝缘膜是含有氟的氧化硅膜，含氟和氮的氧化硅膜或含氟的氮化硅膜中的任一种。

公开(公告)号：US20110227139A1

公开(公告)日：2011-09-22

申请号：US13113255

申请日：2011-05-23

申请人： Tetsuya KAKEHATA ,  Tetsuhiro TANAKA ,  Yoshinobu ASAMI

发明人： Tetsuya KAKEHATA ,  Tetsuhiro TANAKA ,  Yoshinobu ASAMI

IPC分类号： H01L29/788 ,  H01L29/772 ,  H01L29/06

CPC分类号： H01L27/1214 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31645 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/4908 ,  H01L29/66825 ,  H01L29/78603 ,  H01L29/7881

摘要： An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×1011 cm−3 or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen.

摘要翻译： 本发明的目的是提供一种制造具有优异膜特性的绝缘膜的技术。 具体地，目的在于提供一种制造具有高耐压的致密绝缘膜的技术。 此外，目的是提供一种制造具有少量电子阱的绝缘膜的技术。 在包含氧气的气氛中，在电子密度为1×10 11 cm -3以上，电子温度为1.5eV以下的条件下，使用高频率对包含氧的绝缘膜进行等离子体处理。

公开(公告)号：US20110053343A1

公开(公告)日：2011-03-03

申请号：US12942156

申请日：2010-11-09

申请人： Sho KATO ,  Fumito ISAKA ,  Tetsuya KAKEHATA ,  Hiromichi GODO ,  Akihisa SHIMOMURA

发明人： Sho KATO ,  Fumito ISAKA ,  Tetsuya KAKEHATA ,  Hiromichi GODO ,  Akihisa SHIMOMURA

IPC分类号： H01L21/20

CPC分类号： H01L21/84 ,  H01L21/76254 ,  H01L27/1203 ,  H01L29/78606 ,  H01L29/78621 ,  H01L29/78696

摘要： There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.

摘要翻译： 提供了一种半导体器件及其制造方法，该半导体器件不仅可以实现穿通电流的抑制，而且可以实现用于接合的硅晶片的再利用，在制造使用SOI技术的半导体器件中。 在衬底上形成其中注入了与源极区域和漏极区域相反的导电类型的杂质的半导体膜，并且通过SOI技术将单晶半导体膜结合到半导体膜，以形成堆叠 半导体膜。 使用堆叠的半导体膜形成沟道形成区域，从而抑制半导体器件中的穿通电流。

公开(公告)号：US20100291753A1

公开(公告)日：2010-11-18

申请号：US12840379

申请日：2010-07-21

申请人： Tetsuya KAKEHATA ,  Kazutaka KURIKI

发明人： Tetsuya KAKEHATA ,  Kazutaka KURIKI

IPC分类号： H01L21/762

CPC分类号： H01L21/76254

摘要： A single crystal semiconductor layer is formed over a substrate having an insulating surface by the following steps: forming an ion doped layer at a given depth from a surface of a single crystal semiconductor substrate; performing plasma treatment to the surface of the single crystal semiconductor substrate; forming an insulating layer on the single crystal semiconductor substrate to which the plasma treatment is performed; bonding the single crystal semiconductor substrate to the substrate having the insulating surface with an insulating layer interposed therebetween; and separating the single crystal semiconductor substrate using the ion doped layer as a separation surface. As a result, a semiconductor substrate in which a defect in an interface between the single crystal semiconductor layer and the insulating layer is reduced can be provided.

摘要翻译： 通过以下步骤在具有绝缘表面的衬底上形成单晶半导体层：从单晶半导体衬底的表面形成在给定深度处的离子掺杂层; 对所述单晶半导体衬底的表面进行等离子体处理; 在进行等离子体处理的单晶半导体基板上形成绝缘层; 将单晶半导体衬底与绝缘表面的衬底接合在绝缘层之间; 以及使用离子掺杂层作为分离表面分离单晶半导体衬底。 结果，可以提供其中单晶半导体层和绝缘层之间的界面的缺陷减小的半导体衬底。

公开(公告)号：US20100237458A1

公开(公告)日：2010-09-23

申请号：US12792158

申请日：2010-06-02

申请人： Tetsuya KAKEHATA

发明人： Tetsuya KAKEHATA

IPC分类号： H01L27/12

CPC分类号： H01L27/1266 ,  H01L27/112 ,  H01L27/1122 ,  H01L27/12 ,  H01L27/1214 ,  H01L29/66772

摘要： A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over the first insulating film, a step of irradiating the second insulating film with first ions to form a separation layer in the single-crystal semiconductor substrate, a step of irradiating the second insulating film with second ions so that halogen is contained in the first insulating film, and a step of performing heat treatment to separate the single-crystal semiconductor substrate with a single-crystal semiconductor film left over the supporting substrate.

摘要翻译： 提供半导体器件及其制造方法。 该方法包括在单晶半导体衬底上形成含有硅和氧作为其组成的第一绝缘膜的步骤，在第一绝缘膜上形成含有硅和氮作为其组成的第二绝缘膜的步骤， 用第一离子照射第二绝缘膜以在单晶半导体衬底中形成分离层，用第二离子照射第二绝缘膜使得第一绝缘膜中包含卤素的步骤和进行热处理的步骤 以将单晶半导体衬底与留在支撑衬底上的单晶半导体膜分开。

公开(公告)号：US20090162992A1

公开(公告)日：2009-06-25

申请号：US12339413

申请日：2008-12-19

申请人： Sho KATO ,  Fumito ISAKA ,  Tetsuya KAKEHATA ,  Hiromichi GODO ,  Akihisa SHIMOMURA

发明人： Sho KATO ,  Fumito ISAKA ,  Tetsuya KAKEHATA ,  Hiromichi GODO ,  Akihisa SHIMOMURA

IPC分类号： H01L21/30 ,  H01L21/02 ,  H01L21/18

CPC分类号： H01L21/84 ,  H01L21/76254 ,  H01L27/1203 ,  H01L29/78606 ,  H01L29/78621 ,  H01L29/78696

摘要： There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.

摘要翻译： 提供了一种半导体器件及其制造方法，该半导体器件不仅可以实现穿通电流的抑制，而且可以实现用于接合的硅晶片的再利用，在制造使用SOI技术的半导体器件中。 在衬底上形成其中注入了与源极区域和漏极区域相反的导电类型的杂质的半导体膜，并且通过SOI技术将单晶半导体膜结合到半导体膜，以形成堆叠 半导体膜。 使用堆叠的半导体膜形成沟道形成区域，从而抑制半导体器件中的穿通电流。

公开(公告)号：US20120025274A1

公开(公告)日：2012-02-02

申请号：US13267024

申请日：2011-10-06

申请人： Hideto OHNUMA ,  Tetsuya KAKEHATA ,  Yoichi IIKUBO

发明人： Hideto OHNUMA ,  Tetsuya KAKEHATA ,  Yoichi IIKUBO

IPC分类号： H01L29/772 ,  H01L29/04

CPC分类号： H01L21/76254 ,  H01L21/84

摘要： An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700° C. or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.

摘要翻译： 提供了即使使用诸如玻璃基板的具有低的上限温度的基板也可以在实际应用中使用具有SOI层的SOI衬底。 提供了使用这种SOI衬底的半导体器件。 在将单晶半导体层接合到具有绝缘表面的基板或绝缘基板上时，使用在有一个或两个表面上形成键的有机硅烷作为材料形成的氧化硅膜。 根据本发明，可以使用具有700℃以上的上限温度的基板，例如玻璃基板，并且可以获得与基板强结合的SOI层。 换句话说，单晶半导体层可以形成在每侧长于1米的大面积基板上。

公开(公告)号：US20090111248A1

公开(公告)日：2009-04-30

申请号：US12247487

申请日：2008-10-08

申请人： Hideto OHNUMA ,  Tetsuya KAKEHATA ,  Akihisa SHIMOMURA ,  Shinya SASAGAWA ,  Motomu KURATA

发明人： Hideto OHNUMA ,  Tetsuya KAKEHATA ,  Akihisa SHIMOMURA ,  Shinya SASAGAWA ,  Motomu KURATA

IPC分类号： H01L21/02

CPC分类号： H01L21/76254 ,  H01L21/02532 ,  H01L21/02686 ,  H01L21/268 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/84

摘要： A damaged region is formed by generation of plasma by excitation of a source gas, and by addition of ion species contained in the plasma from one of surfaces of a single crystal semiconductor substrate; an insulating layer is formed over the other surface of the single crystal semiconductor substrate; a supporting substrate is firmly attached to the single crystal semiconductor substrate so as to face the single crystal semiconductor substrate with the insulating layer interposed therebetween; separation is performed at the damaged region into the supporting substrate to which a single crystal semiconductor layer is attached and part of the single crystal semiconductor substrate by heating of the single crystal semiconductor substrate; dry etching is performed on a surface of the single crystal semiconductor layer attached to the supporting substrate; the single crystal semiconductor layer is recrystallized by irradiation of the single crystal semiconductor layer with a laser beam to melt at least part of the single crystal semiconductor layer.

摘要翻译： 通过源气体的激发产生等离子体并通过从单晶半导体衬底的表面之一添加包含在等离子体中的离子种类而形成损伤区域; 在单晶半导体衬底的另一个表面上形成绝缘层; 支撑衬底牢固地附接到单晶半导体衬底，以便在其间插入绝缘层的单晶半导体衬底; 通过加热单晶半导体衬底，在损伤区域处分离成与单晶半导体层相连的支撑衬底和部分单晶半导体衬底; 在附着于支撑基板的单晶半导体层的表面进行干蚀刻， 通过用激光束照射单晶半导体层来使单晶半导体层重结晶，从而熔化至少一部分单晶半导体层。

公开(公告)号：US20090096054A1

公开(公告)日：2009-04-16

申请号：US12237606

申请日：2008-09-25

申请人： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Tetsuya KAKEHATA

发明人： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Tetsuya KAKEHATA

IPC分类号： H01L29/00 ,  H01L21/762

CPC分类号： H01L21/84 ,  H01L21/76254 ,  H01L29/42384 ,  H01L29/66772 ,  H01L29/78621

摘要： A semiconductor device including a semiconductor substrate is provided. The semiconductor substrate includes a substrate having an insulating surface, and a plurality of stacks over the substrate having an insulating surface. Each of the plurality of stacks includes a bonding layer over the substrate having an insulating surface, an insulating layer over the bonding layer, and a single crystal semiconductor layer over the insulating layer. The substrate having an insulating surface has a depression, and the depression is provided between one of the plurality of stacks and another adjacent one of the plurality of stacks.

摘要翻译： 提供了包括半导体衬底的半导体器件。 半导体衬底包括具有绝缘表面的衬底和在衬底上的多个堆叠，其具有绝缘表面。 多个堆叠中的每一个在基板上包括具有绝缘表面的接合层，接合层上的绝缘层以及绝缘层上的单晶半导体层。 具有绝缘表面的基板具有凹陷，并且凹陷设置在多个叠层中的一个和多个叠层中的另一个相邻的堆叠之间。