公开(公告)号：US08872251B2

公开(公告)日：2014-10-28

申请号：US13468412

申请日：2012-05-10

申请人： Yoshinobu Asami

发明人： Yoshinobu Asami

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  G11C16/0441 ,  H01L27/11521 ,  H01L27/1214 ,  H01L29/66825

摘要： An object is to suppress reading error even in the case where writing and erasing are repeatedly performed. Further, another object is to reduce writing voltage and erasing voltage while increase in the area of a memory transistor is suppressed. A floating gate and a control gate are provided with an insulating film interposed therebetween over a first semiconductor layer for writing operation and erasing operation and a second semiconductor layer for reading operation which are provided over a substrate; injection and release of electrons to and from the floating gate are performed using the first semiconductor layer; and reading is performed using the second semiconductor layer.

摘要翻译： 即使在重复执行写入和擦除的情况下，也是抑制读取错误的目的。 此外，另一个目的是降低写入电压和擦除电压，同时抑制存储晶体管的面积增加。 浮置栅极和控制栅极在其上方设置有用于写入操作和擦除操作的第一半导体层和设置在基板上的用于读取操作的第二半导体层之间的绝缘膜; 使用第一半导体层进行向浮栅的注入和释放电子; 并且使用第二半导体层执行读取。

公开(公告)号：US08649895B2

公开(公告)日：2014-02-11

申请号：US11402361

申请日：2006-04-12

申请人： Yoshinobu Asami

发明人： Yoshinobu Asami

IPC分类号： G06F19/00

CPC分类号： H01L23/66 ,  G06Q10/06 ,  H01L21/00 ,  H01L2924/0002 ,  H01L2924/00

摘要： A lot of buildings have been built while it is concerned that a building material is used fraudulently. Therefore, the present invention provides a managing method of the material and a system thereof. The present invention provides a managing method including a step of attaching a sheet including a plurality of memories to each surface of a plurality of materials, a step of dividing the plurality of materials with the sheet in accordance with data in the memory, a step of constructing a building by using the divided material in accordance with the data in the memory, and a step of checking the data on the constructed building, which is stored in the plurality of memories.

摘要翻译： 很多建筑物被建造，而担心建筑材料被欺骗性地使用。 因此，本发明提供了一种材料的管理方法及其系统。 本发明提供了一种管理方法，其包括将包含多个存储器的片材附着到多个材料的每个表面的步骤，根据存储器中的数据将多个材料与片材分开的步骤，步骤 通过使用根据存储器中的数据的分割材料构建建筑物，以及检查存储在多个存储器中的构造建筑物上的数据的步骤。

公开(公告)号：US20130056715A1

公开(公告)日：2013-03-07

申请号：US13602352

申请日：2012-09-04

申请人： Yoshinobu ASAMI ,  Riho KATAISHI

发明人： Yoshinobu ASAMI ,  Riho KATAISHI

IPC分类号： H01L51/42

CPC分类号： H01L31/02167 ,  Y02E10/549

摘要： To provide a photoelectric conversion device which has little light loss caused by light absorption in a window layer, the photoelectric conversion device includes a first electrode, a first semiconductor layer formed over the first electrode, a second semiconductor layer formed over the first semiconductor layer, a third semiconductor layer formed over the second semiconductor layer, and a second electrode formed over the third semiconductor layer; and the first semiconductor layer is a light-transmitting semiconductor layer containing an organic compound and an inorganic compound, and the second semiconductor layer and the third semiconductor layer are each a semiconductor layer containing an organic compound.

摘要翻译： 为了提供在窗口层中由光吸收引起的光损失小的光电转换装置，光电转换装置包括第一电极，形成在第一电极上的第一半导体层，形成在第一半导体层上的第二半导体层， 形成在所述第二半导体层上的第三半导体层，以及形成在所述第三半导体层上的第二电极; 并且第一半导体层是含有有机化合物和无机化合物的透光性半导体层，第二半导体层和第三半导体层各自为含有有机化合物的半导体层。

公开(公告)号：US08295104B2

公开(公告)日：2012-10-23

申请号：US12618161

申请日：2009-11-13

申请人： Hiroko Abe ,  Mikio Yukawa ,  Tamae Takano ,  Yoshinobu Asami ,  Kiyoshi Kato ,  Ryoji Nomura ,  Yoshitaka Moriya

发明人： Hiroko Abe ,  Mikio Yukawa ,  Tamae Takano ,  Yoshinobu Asami ,  Kiyoshi Kato ,  Ryoji Nomura ,  Yoshitaka Moriya

IPC分类号： G11C7/00

CPC分类号： H01L27/1266 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/04 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L27/13 ,  H01L27/283 ,  H01L51/0059

摘要： It is an object of the present invention to provide a volatile organic memory in which data can be written other than during manufacturing and falsification by rewriting can be prevented, and to provide a semiconductor device including such an organic memory. It is a feature of the invention that a semiconductor device includes a plurality of bit lines extending in a first direction; a plurality of word lines extending in a second direction different from the first direction; a memory cell array including a plurality of memory cells each provided at one of intersections of the bit lines and the word lines; and memory elements provided in the memory cells, wherein the memory elements include bit lines, an organic compound layer, and the word lines, and the organic compound layer includes a layer in which an inorganic compound and an organic compound are mixed.

摘要翻译： 本发明的一个目的是提供一种挥发性有机存储器，其中除了在制造期间可以写入数据，并且可以防止通过改写伪造，并提供包括这种有机存储器的半导体器件。 本发明的特征在于，半导体器件包括沿第一方向延伸的多个位线; 沿与第一方向不同的第二方向延伸的多个字线; 存储单元阵列，包括多个存储单元，每个存储单元分别设置在位线和字线的交点之一处; 以及设置在存储单元中的存储元件，其中存储元件包括位线，有机化合物层和字线，有机化合物层包括混合有无机化合物和有机化合物的层。

公开(公告)号：US08227863B2

公开(公告)日：2012-07-24

申请号：US11723481

申请日：2007-03-20

申请人： Shunpei Yamazaki ,  Yoshinobu Asami ,  Tamae Takano ,  Makoto Furuno

发明人： Shunpei Yamazaki ,  Yoshinobu Asami ,  Tamae Takano ,  Makoto Furuno

IPC分类号： H01L29/76

CPC分类号： H01L27/1237 ,  G11C16/349 ,  H01L21/28273 ,  H01L21/84 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/78696 ,  H01L29/7881

摘要： A semiconductor layer having a channel formation region provided between a pair of impurity regions spaced from each other is provided, and a first insulating layer a floating gate, a second insulating layer, and a control gate are provided above the semiconductor layer. The semiconductor material forming the floating gate preferably has a band gap smaller than that of the semiconductor layer. The band gap of a channel formation region in the semiconductor material forming the floating gate is preferably smaller than that of the semiconductor layer by 0.1 eV or more.

摘要翻译： 提供具有设置在彼此间隔开的一对杂质区之间的沟道形成区的半导体层，并且在半导体层上方设置有第一绝缘层，浮栅，第二绝缘层和控制栅。 形成浮栅的半导体材料优选具有比半导体层小的带隙。 形成浮栅的半导体材料中的沟道形成区的带隙优选比半导体层的带隙小0.1eV以上。

公开(公告)号：US08212302B2

公开(公告)日：2012-07-03

申请号：US11723484

申请日：2007-03-20

申请人： Shunpei Yamazaki ,  Yoshinobu Asami ,  Tamae Takano ,  Makoto Furuno

发明人： Shunpei Yamazaki ,  Yoshinobu Asami ,  Tamae Takano ,  Makoto Furuno

IPC分类号： H01L29/76

CPC分类号： H01L29/42324 ,  H01L29/513 ,  H01L29/7883 ,  H01L29/7885

摘要： A nonvolatile semiconductor memory device which is superior in writing property and charge holding property, including a semiconductor substrate in which a channel formation region is formed between a pair of impurity regions, and a first insulating layer, a floating gate, a second insulating layer, and a control gate over the semiconductor substrate. The floating gate includes at least two layers. It is preferable that a band gap of a first layer included in the floating gate, which is in contact with the first insulating layer, be smaller than that of the semiconductor substrate. For example, it is preferable that the band gap of the semiconductor material for forming the floating gate be smaller than that of the channel formation region in the semiconductor substrate by 0.1 eV or more. This is because, by lowering the bottom energy level of a conduction band of the floating gate electrode than that of the channel formation region in the semiconductor substrate, a carrier injecting property and a charge holding property are improved.

摘要翻译： 一种非易失性半导体存储器件，其特征在于具有在一对杂质区域之间形成沟道形成区域的半导体衬底和第一绝缘层，浮置栅极，第二绝缘层， 以及半导体衬底上的控制栅极。 浮栅包括至少两层。 与第一绝缘层接触的浮栅中包含的第一层的带隙优选小于半导体衬底的带隙。 例如，优选用于形成浮置栅极的半导体材料的带隙比半导体衬底中的沟道形成区域的带隙小0.1eV以上。 这是因为通过降低浮置栅电极的导带的底部能级比半导体衬底中的沟道形成区的底部能级降低，因此提高了载流子注入性和电荷保持性。

公开(公告)号：US08188535B2

公开(公告)日：2012-05-29

申请号：US12436580

申请日：2009-05-06

申请人： Yoshinobu Asami

发明人： Yoshinobu Asami

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  G11C16/0441 ,  H01L27/11521 ,  H01L27/1214 ,  H01L29/66825

摘要： An object is to suppress reading error even in the case where writing and erasing are repeatedly performed. Further, another object is to reduce writing voltage and erasing voltage while increase in the area of a memory transistor is suppressed. A floating gate and a control gate are provided with an insulating film interposed therebetween over a first semiconductor layer for writing operation and erasing operation and a second semiconductor layer for reading operation which are provided over a substrate; injection and release of electrons to and from the floating gate are performed using the first semiconductor layer; and reading is performed using the second semiconductor layer.

摘要翻译： 即使在重复执行写入和擦除的情况下，也是抑制读取错误的目的。 此外，另一个目的是降低写入电压和擦除电压，同时抑制存储晶体管的面积增加。 浮置栅极和控制栅极在其上方设置有用于写入操作和擦除操作的第一半导体层和设置在基板上的用于读取操作的第二半导体层之间的绝缘膜; 使用第一半导体层进行向浮栅的注入和释放电子; 并且使用第二半导体层执行读取。

公开(公告)号：US20120108029A1

公开(公告)日：2012-05-03

申请号：US13295304

申请日：2011-11-14

申请人： Mikio YUKAWA ,  Nobuharu OHSAWA ,  Ryoji NOMURA ,  Yoshinobu ASAMI

发明人： Mikio YUKAWA ,  Nobuharu OHSAWA ,  Ryoji NOMURA ,  Yoshinobu ASAMI

IPC分类号： H01L21/02

CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/285 ,  H01L51/0591

摘要： It is an object of the present invention to provide a technique in which a high-performance and high reliable memory device and a semiconductor device provided with the memory device are manufactured at low cost with high yield. The semiconductor device includes an organic compound layer including an insulator over a first conductive layer and a second conductive layer over the organic compound layer including an insulator. Further, the semiconductor device is manufactured by forming a first conductive layer, discharging a composition of an insulator and an organic compound over the first conductive layer to form an organic compound layer including an insulator, and forming a second conductive layer over the organic compound layer including an insulator.

摘要翻译： 本发明的一个目的是提供一种以高成本低成本制造高性能且高可靠性的存储器件和设置有存储器件的半导体器件的技术。 半导体器件包括在第一导电层上包括绝缘体的有机化合物层和包含绝缘体的有机化合物层上的第二导电层。 此外，半导体器件通过在第一导电层上形成第一导电层，排出绝缘体和有机化合物的组合物而形成包含绝缘体的有机化合物层，并在有机化合物层上形成第二导电层来制造 包括绝缘体。

公开(公告)号：US20110272752A1

公开(公告)日：2011-11-10

申请号：US13186041

申请日：2011-07-19

申请人： Yoshinobu ASAMI

发明人： Yoshinobu ASAMI

IPC分类号： H01L29/772

CPC分类号： H01L27/1288 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11531 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13

摘要： To provide a semiconductor device having a memory element, and which is manufactured by a simplified manufacturing process. A method of manufacturing a semiconductor device includes, forming a first insulating film to cover a first semiconductor film and a second semiconductor film; forming a first conductive film and a second conductive film over the first semiconductor film and the second semiconductor film, respectively, with the first insulating film interposed therebetween; forming a second insulating film to cover the first conductive film; forming a third conductive film selectively over the first conductive film which is formed over the first semiconductor film, with the second insulating film interposed therebetween, and doping the first semiconductor film with an impurity element with the third conductive film serving as a mask and doping the second semiconductor film with the impurity element through the second conductive film.

摘要翻译： 提供具有存储元件的半导体器件，其通过简化的制造工艺制造。 一种制造半导体器件的方法包括：形成第一绝缘膜以覆盖第一半导体膜和第二半导体膜; 在所述第一半导体膜和所述第二半导体膜上分别在所述第一绝缘膜之间形成第一导电膜和第二导电膜; 形成第二绝缘膜以覆盖所述第一导电膜; 在形成在第一半导体膜上的第一导电膜上选择性地形成第三导电膜，其中介于第二绝缘膜之间，并且用第三导电膜作为掩模，用杂质元素掺杂第一半导体膜，并掺杂 具有通过第二导电膜的杂质元素的第二半导体膜。

公开(公告)号：US20100273302A1

公开(公告)日：2010-10-28

申请号：US12829686

申请日：2010-07-02

申请人： Yoshinobu ASAMI

发明人： Yoshinobu ASAMI

IPC分类号： H01L21/8239

CPC分类号： H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1285 ,  H01L27/1292 ,  H01L27/13 ,  H01L28/91 ,  H01L29/41733 ,  H01L29/51 ,  H01L29/78618

摘要： As for a memory element implemented in a semiconductor device typified by an RFID, it is an object of the present invention to reduce manufacturing steps and to provide a memory element and a memory circuit having the element with reduced cost. It is a feature of the present invention that a memory element sandwiched between electrodes has an organic compound, and an electrode connected to a semiconductor element controlling the memory element functions as an electrode of the memory element. In addition, an extremely thin semiconductor film formed on an insulated surface is used for the memory element; therefore cost can be reduced.

摘要翻译： 对于以由RFID代表的半导体器件中实现的存储元件，本发明的目的是减少制造步骤，并提供具有降低成本的具有该元件的存储元件和存储电路。 本发明的特征在于，夹在电极之间的存储元件具有有机化合物，并且连接到控制存储元件的半导体元件的电极用作存储元件的电极。 此外，在绝缘表面上形成的非常薄的半导体膜用于存储元件; 因此可以降低成本。