-
公开(公告)号：US11984941B2
公开(公告)日：2024-05-14
申请号：US18100131
申请日：2023-01-23
Applicant: Texas Instruments Incorporated
Inventor： Srijan Rastogi , Mayank Garg , Anant Shankar Kamath
CPC classification number: H04B3/36 , H03F3/45179
Abstract: Universal Serial Bus (USB) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. In a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. The receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. End-of-packet (EOP) dribble in USB communications in the HS mode is reduced by the offset at the hysteresis stage.
-
公开(公告)号：US11863360B2
公开(公告)日：2024-01-02
申请号：US17584099
申请日：2022-01-25
Applicant: Texas Instruments Incorporated
Inventor： Kumar Anurag Shrivastava , Siraj Akhtar , Swaminathan Sankaran , Anant Shankar Kamath
Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.
-
公开(公告)号：US20230308323A1
公开(公告)日：2023-09-28
申请号：US17584099
申请日：2022-01-25
Applicant: Texas Instruments Incorporated
Inventor： Kumar Anurag Shrivastava , Siraj Akhtar , Swaminathan Sankaran , Anant Shankar Kamath
IPC: H04L27/04
CPC classification number: H04L27/04
Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.
-
公开(公告)号：US11671138B2
公开(公告)日：2023-06-06
申请号：US17489483
申请日：2021-09-29
Applicant: Texas Instruments Incorporated
Inventor： RR Manikandan , Kumar Anurag Shrivastava , Robert Floyd Payne , Anant Shankar Kamath , Swaminathan Sankaran , Kishalay Datta , Siraj Akhtar , Mark Edward Wentroble , Suvadip Banerjee , Rakesh Hariharan , Gurumurti Kailaschandra Avhad
CPC classification number: H04B1/44 , H03K3/017 , H03K5/24 , H04L27/04 , H04L27/066
Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.
-
公开(公告)号：US11012034B2
公开(公告)日：2021-05-18
申请号：US16023277
申请日：2018-06-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anant Shankar Kamath , Sreeram N S
Abstract: Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.
-
Patent Agency Ranking
公开(公告)号：US10014760B2
公开(公告)日：2018-07-03
申请号：US15395370
申请日：2016-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Shailendra Kumar Baranwal , Alan Stephen Bass , Vighnesh Rudra Das , Anant Shankar Kamath , Abhijeeth Aarey Premanath
CPC classification number: H02M1/08 , H02M1/36 , H02M3/33515 , H03K17/163 , H03K17/164
Abstract: One example includes a switch circuit. The switch circuit includes a transistor configured to activate in response to an activation voltage at an activation terminal of the transistor. The switch circuit also includes a current source coupled to the activation terminal and being configured to generate an activation current. The switch circuit further includes a driver control circuit interconnecting the activation terminal and a voltage rail. The driver control circuit includes digital counter logic configured to cycle through a predetermined number of count values based on an oscillator signal. The driver control circuit is configured to adjust an amplitude of the activation voltage at each of the predetermined number of count values based on the activation current to provide a soft-start activation of the transistor.
-
公开(公告)号：US20170302225A1
公开(公告)日：2017-10-19
申请号：US15640168
申请日：2017-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Anant Shankar Kamath , Sreeran N S
CPC classification number: H03D3/00 , H04L25/0268
Abstract: Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.
-
公开(公告)号：US20160300907A1
公开(公告)日：2016-10-13
申请号：US14680211
申请日：2015-04-07
Applicant: Texas Instruments Incorporated
Inventor： Raja Selvaraj , Anant Shankar Kamath , Byron Lovell Williams , Thomas D. Bonifield , John Kenneth Arch
IPC: H01L29/06 , H01L21/768 , H01L21/761 , H01L21/265 , H01L27/06 , H01L49/02
CPC classification number: H01L29/0646 , H01L21/265 , H01L21/761 , H01L23/5223 , H01L23/5227 , H01L23/5286 , H01L24/05 , H01L27/0676 , H01L28/10 , H01L28/20 , H01L28/40 , H01L28/60 , H01L2224/48463
Abstract: Isolator structures for an integrated circuit with reduced effective parasitic capacitance. Disclosed embodiments include an isolator structure with parallel conductive elements forming a capacitor or inductive transformer, overlying a semiconductor structure including a well region of a first conductivity type formed within an tank region of a second conductivity type. The tank region is surrounded by doped regions and a buried doped layer of the first conductivity type, forming a plurality of diodes in series to the substrate. The junction capacitances of the series diodes have the effect of reducing the parasitic capacitance apparent at the isolator.
Abstract translation: 具有降低的有效寄生电容的集成电路的隔离器结构。 公开的实施例包括具有形成电容器或电感变压器的并联导电元件的隔离器结构，覆盖包括形成在第二导电类型的槽区域内的第一导电类型的阱区的半导体结构。 槽区被掺杂区域和第一导电类型的掩埋掺杂层围绕，形成与衬底串联的多个二极管。 串联二极管的结电容具有降低隔离器明显的寄生电容的作用。
-
公开(公告)号：US20250158614A1
公开(公告)日：2025-05-15
申请号：US18391909
申请日：2023-12-21
Applicant: Texas Instruments Incorporated
Inventor： Amal Kumar Kundu , Anant Shankar Kamath
IPC: H03K19/0185 , H02M1/08 , H02M1/32 , H03K17/082
Abstract: Described embodiments include a voltage level shifter with a first driver having an input that receives a first signal, an output, a positive supply terminal coupled to a first supply terminal, and a negative supply terminal coupled to a second supply terminal. A transistor has first and second current terminals and a first control terminal. The first current terminal is coupled to the first driver output, and the first control terminal is adapted to be coupled to a low-side drive transistor control terminal. A second driver has an input coupled to the second current terminal, an output, a positive supply terminal coupled to a third supply terminal, and a negative supply terminal coupled to ground. The second driver provides a second signal at the second driver output. A voltage at the third supply terminal is less than 10% of a voltage at the first supply terminal.
-
公开(公告)号：US20240250715A1
公开(公告)日：2024-07-25
申请号：US18625353
申请日：2024-04-03
Applicant: Texas Instruments Incorporated
Inventor： Srijan Rastogi , Mayank Garg , Anant Shankar Kamath
CPC classification number: H04B3/36 , H03F3/45179
Abstract: Universal Serial Bus (USB) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. In a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. The receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. End-of-packet (EOP) dribble in USB communications in the HS mode is reduced by the offset at the hysteresis stage.
-
-
-
-
-
-
-
-
-
Search Results
55
records
(took 0.02 seconds)
