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    BONDING SLEEVE FOR A MEDICAL DEVICE
    13.
    发明申请
    BONDING SLEEVE FOR A MEDICAL DEVICE 有权
    用于医疗设备的连接套管

    公开(公告)号：US20110054394A1

    公开(公告)日：2011-03-03

    申请号：US12872882

    申请日：2010-08-31

    申请人： Matthew C. Heidner ,  Thomas J. Holman

    发明人： Matthew C. Heidner ,  Thomas J. Holman

    IPC分类号： A61M29/00 ,  B29C65/02

    CPC分类号： A61F2/958 ,  A61F2002/9583

    摘要： A medical device delivery system comprises an inner tube, a medical device disposed about a portion of the distal region of the inner tube, a medical device sheath disposed about the medical device, a medical device sheath retraction device extending proximally from the medical device sheath and an outer sheath disposed about a portion of the medical device sheath retraction device. The distal end of the outer sheath terminates at least one medical device length proximal of the medical device. The medical device sheath is movable relative to the outer sheath and relative to the inner tube.

    摘要翻译： 医疗装置输送系统包括内管，围绕内管的远端区域的一部分设置的医疗装置，围绕医疗装置设置的医疗装置护套，从医疗装置护套向近侧延伸的医疗装置护套收回装置， 设置在所述医疗装置鞘缩回装置的一部分周围的外护套。 外护套的远端终止医疗装置近端的至少一个医疗装置长度。 医疗器械护套可相对于外护套和相对于内管移动。

    Medical devices
    14.
    发明授权
    Medical devices 有权
    医疗设备

    公开(公告)号：US07691082B2

    公开(公告)日：2010-04-06

    申请号：US11174258

    申请日：2005-07-01

    申请人： James Lee Shippy, III ,  Thomas J. Holman

    发明人： James Lee Shippy, III ,  Thomas J. Holman

    IPC分类号： A61M31/00

    CPC分类号： A61M25/1002 ,  A61M25/1029 ,  A61M25/1038 ,  A61M2025/1004 ,  A61M2025/1031 ,  A61M2025/1075 ,  A61M2025/1086 ,  Y10T428/139

    摘要： Medical devices, for example, those that have balloons, and methods of making the devices are described. For example, in some embodiments, a medical device includes an elongated shaft, and an inflatable balloon carried by the shaft. The balloon includes a first recessed channel, a second recessed channel, a third recessed channel, and a fourth recessed channel, wherein the first recessed channel is spaced from the second recessed channel by a first distance, the third recessed channel is spaced from the fourth recessed channel by the first distance, and the second recessed channel is spaced from the third recessed channel by a second distance different than the first distance.

    摘要翻译： 描述了医疗设备，例如具有气球的设备，以及制造设备的方法。 例如，在一些实施例中，医疗装置包括细长轴和由轴承载的可膨胀气囊。 气球包括第一凹槽，第二凹槽，第三凹槽和第四凹槽，其中第一凹槽与第二凹槽相隔第一距离，第三凹槽与第四凹槽相隔， 并且所述第二凹陷通道与所述第三凹陷通道间隔不同于所述第一距离的第二距离。

    Mechanism for Adjacent-Symbol Error Correction and Detection
    15.
    发明申请
    Mechanism for Adjacent-Symbol Error Correction and Detection 有权
    相邻符号误差校正和检测机制

    公开(公告)号：US20090125786A1

    公开(公告)日：2009-05-14

    申请号：US12354037

    申请日：2009-01-15

    申请人： James W. Alexander ,  Thomas J. Holman ,  Mark A. Heap ,  Stanley S. Kulick

    发明人： James W. Alexander ,  Thomas J. Holman ,  Mark A. Heap ,  Stanley S. Kulick

    IPC分类号： G11C29/04 ,  G06F11/07 ,  G06F11/22

    CPC分类号： G11C29/42 ,  G11C11/401 ,  G11C2029/0409

    摘要： According to one embodiment a computer system is disclosed. The computer system includes memory. The memory includes two or more rows, where each row has a plurality of memory devices. The computer system also includes a chipset. The chipset includes a detection/correction circuit to detect single and double symbol errors and correct single symbol errors for each memory row, and markers to maintain a log of errors within each memory row.

    摘要翻译： 根据一个实施例，公开了一种计算机系统。 计算机系统包括内存。 存储器包括两行或更多行，其中每行具有多个存储器件。 计算机系统还包括芯片组。 该芯片组包括一个检测/校正电路，用于检测单个和双重符号错误，并纠正每个存储器行的单个符号错误，以及标记以维护每个存储器行内的错误日志。

    Memory expansion channel for propagation of control and request packets
    19.
    发明授权
    Memory expansion channel for propagation of control and request packets 失效
    用于传播控制和请求数据包的内存扩展通道

    公开(公告)号：US06633947B1

    公开(公告)日：2003-10-14

    申请号：US09154063

    申请日：1998-09-16

    申请人： Thomas J. Holman ,  Peter D. MacWilliams

    发明人： Thomas J. Holman ,  Peter D. MacWilliams

    IPC分类号： G06F1200

    CPC分类号： G06F13/1684 ,  G06F13/4243

    摘要： A memory system comprising an expansion buffer and a memory expansion channel for connecting a large array of memory devices, such as Direct RDRAMs, to a memory controller. The memory devices are partitioned into subsets of memory devices so that each subset is connected to a unique memory channel for sending and receiving data. The expansion buffer and memory expansion channel provide communication with the memory devices via control packets on the expansion bus, where each control packet has a channel identification field to store a channel identifier; and via request packets on the expansion bus, where each request packet is associated with a control packet. The expansion buffer routes a request packet to a unique channel based upon the channel identifier stored in the associated control packet.

    摘要翻译： 一种存储器系统，包括扩展缓冲器和用于将诸如Direct RDRAM的大量存储器件连接到存储器控制器的存储器扩展通道。 存储器件被划分为存储器件的子集，使得每个子集连接到用于发送和接收数据的唯一存储器通道。 扩展缓冲器和存储器扩展通道通过扩展总线上的控制分组提供与存储器件的通信，其中每个控制分组具有用于存储信道标识符的信道标识字段; 并且经由扩展总线上的请求分组，其中每个请求分组与控制分组相关联。 扩展缓冲器基于存储在相关联的控制分组中的信道标识符将请求分组路由到唯一信道。

    Memory device and system including a low power interface
    20.
    发明授权
    Memory device and system including a low power interface 有权
    存储器件和系统包括低功率接口

    公开(公告)号：US06378018B1

    公开(公告)日：2002-04-23

    申请号：US09169506

    申请日：1998-10-09

    申请人： Ely K. Tsern ,  Thomas J. Holman ,  Richard M. Barth ,  Andrew V. Anderson ,  Paul G. Davis ,  Craig E. Hampel ,  Donald C. Stark ,  Abhijit M. Abhyankar

    发明人： Ely K. Tsern ,  Thomas J. Holman ,  Richard M. Barth ,  Andrew V. Anderson ,  Paul G. Davis ,  Craig E. Hampel ,  Donald C. Stark ,  Abhijit M. Abhyankar

    IPC分类号： G06F1300

    CPC分类号： G06F13/4243 ,  G06F13/1694 ,  Y02D10/14 ,  Y02D10/151

    摘要： A memory system includes an interconnect structure with a high speed channel and a low speed channel. A memory device with interface circuitry is coupled to the interconnect structure. The interface circuitry includes a high power interface for coupling to the high speed channel and a low power interface for coupling to the low speed channel. The memory device is operative in a low power mode and a high power mode. A memory controller is coupled to the high speed channel and the low speed channel of the interconnect structure. The memory controller is configured to transmit control information over the low speed channel to set the power mode of the memory device. The memory device is operative in a low power mode during which high power receiver circuits are turned off. The memory device is also operative in a nap mode during which an internal clock compensation circuit is left on to preserve phase information. The memory system may include multiple memory devices coupled to a daisy chained lead of the interconnect structure. The memory controller may be configured to apply control information to the interconnect structure as an encoded device identification word. The memory devices may each include a decoder for interpreting the encoded device identification word. The memory controller may be configured to apply a memory device selection signal to the interconnect structure to selectively enable the memory devices.

    摘要翻译： 存储器系统包括具有高速通道和低速通道的互连结构。 具有接口电路的存储器件耦合到互连结构。 接口电路包括用于耦合到高速通道的高功率接口和用于耦合到低速通道的低功率接口。 存储器件在低功率模式和高功率模式下工作。 存储器控制器耦合到互连结构的高速通道和低速通道。 存储器控制器被配置为通过低速信道发送控制信息以设置存储器件的功率模式。 存储器件在低功率模式下工作，在此期间高功率接收器电路被关闭。 存储器装置还可以在休眠模式下工作，在此模式期间内部时钟补偿电路被保留以保持相位信息。 存储器系统可以包括耦合到互连结构的菊花链引导件的多个存储器件。 存储器控制器可以被配置为将控制信息作为编码设备标识字应用于互连结构。 存储器件可以各自包括用于解释编码器件识别字的解码器。 存储器控制器可以被配置为将存储器件选择信号施加到互连结构以选择性地启用存储器件。