公开(公告)号：US10262987B2

公开(公告)日：2019-04-16

申请号：US15481444

申请日：2017-04-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Cih Wang ,  Lu-An Chen ,  Tien-Hao Tang

IPC: H01L27/02 ,  H02H9/04

Abstract: The present invention provides an ESD protection circuit electrically connected between a high voltage power line and a low voltage power line, and the ESD protection circuit includes a bipolar junction transistor (BJT) and a trigger source. A collector of the BJT is electrically connected to the high voltage power line, and an emitter and a base of the BJT are electrically connected to the low voltage power line. The trigger source is electrically connected between the base of the BJT and the high voltage power line.

公开(公告)号：US09825021B2

公开(公告)日：2017-11-21

申请号：US14685588

申请日：2015-04-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Tien-Hao Tang

IPC: H01L29/08 ,  H01L29/78 ,  H01L27/02 ,  H01L23/60 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L27/0266 ,  H01L23/60 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66659 ,  H01L29/78 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, a gate positioned on the substrate, a drain region and a source region formed at respective two sides of the gate in the substrate, at least a first doped region formed in the drain region, and at least a first well having the first doped region formed therein. The source region and the drain region include a first conductivity type, the first doped region and the first well include a second conductivity type, and the first conductivity type and the second conductivity type are complementary to each other.

公开(公告)号：US20160118374A1

公开(公告)日：2016-04-28

申请号：US14986741

申请日：2016-01-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Ya-Ting Lin ,  Tien-Hao Tang

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/87 ,  H01L29/74

CPC classification number: H01L27/0262 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/402 ,  H01L29/7432 ,  H01L29/87

Abstract: An electrostatic discharge protection structure comprises an isolation layer, a high voltage P-well, an N-well, a P-well, a first doped region of N-type conductivity, a second doped region of P-type conductivity, a third doped region of N-type conductivity, a fourth doped region of P-type conductivity, an anode, and a cathode. The isolation layer is disposed on a substrate. The high voltage P-well is disposed on the isolation layer. The N-well is disposed in the high voltage P-well. The P-well is disposed in the high voltage P-well, and the P-well is separated from the N-well. The first and the second doped regions are disposed in the N-well. The third and the fourth doped regions are disposed in the P-well. The anode is electrically connected to the first doped region and the second doped region, and the cathode is electrically connected to the fourth doped region.

Abstract translation: 静电放电保护结构包括隔离层，高电压P阱，N阱，P阱，N型导电的第一掺杂区，P型导电的第二掺杂区，第三掺杂区 N型导电性区域，P型导电性的第四掺杂区域，阳极和阴极。 隔离层设置在基板上。 高压P阱设置在隔离层上。 N阱设置在高压P阱中。 P阱设置在高电压P阱中，P阱与N阱分离。 第一和第二掺杂区域设置在N阱中。 第三和第四掺杂区域设置在P阱中。 阳极电连接到第一掺杂区域和第二掺杂区域，阴极电连接到第四掺杂区域。

公开(公告)号：US20140284720A1

公开(公告)日：2014-09-25

申请号：US13848069

申请日：2013-03-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Tien-Hao Tang

IPC: H01L29/78 ,  H01L23/60

CPC classification number: H01L27/0266 ,  H01L23/60 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66659 ,  H01L29/78 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, a gate positioned on the substrate, a drain region and a source region formed at respective two sides of the gate in the substrate, at least a first doped region formed in the drain region, and at least a first well having the first doped region formed therein. The source region and the drain region include a first conductivity type, the first doped region and the first well include a second conductivity type, and the first conductivity type and the second conductivity type are complementary to each other.

Abstract translation: 半导体器件包括衬底，位于衬底上的栅极，形成在衬底中的栅极的相应两侧处的漏极区域和源极区域，形成在漏极区域中的至少第一掺杂区域，以及至少第一 其中形成有第一掺杂区。 源区和漏区包括第一导电类型，第一掺杂区和第一阱包括第二导电类型，并且第一导电类型和第二导电类型彼此互补。

公开(公告)号：US09443841B2

公开(公告)日：2016-09-13

申请号：US14986741

申请日：2016-01-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Ya-Ting Lin ,  Tien-Hao Tang

IPC: H01L23/62 ,  H01L27/02 ,  H01L29/74 ,  H01L29/08 ,  H01L29/06 ,  H01L29/87 ,  H01L29/40

CPC classification number: H01L27/0262 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/402 ,  H01L29/7432 ,  H01L29/87

Abstract: An electrostatic discharge protection structure comprises an isolation layer, a high voltage P-well, an N-well, a P-well, a first doped region of N-type conductivity, a second doped region of P-type conductivity, a third doped region of N-type conductivity, a fourth doped region of P-type conductivity, an anode, and a cathode. The isolation layer is disposed on a substrate. The high voltage P-well is disposed on the isolation layer. The N-well is disposed in the high voltage P-well. The P-well is disposed in the high voltage P-well, and the P-well is separated from the N-well. The first and the second doped regions are disposed in the N-well. The third and the fourth doped regions are disposed in the P-well. The anode is electrically connected to the first doped region and the second doped region, and the cathode is electrically connected to the fourth doped region.

Abstract translation: 静电放电保护结构包括隔离层，高电压P阱，N阱，P阱，N型导电的第一掺杂区，P型导电的第二掺杂区，第三掺杂区 N型导电性区域，P型导电性的第四掺杂区域，阳极和阴极。 隔离层设置在基板上。 高压P阱设置在隔离层上。 N阱设置在高压P阱中。 P阱设置在高电压P阱中，P阱与N阱分离。 第一和第二掺杂区域设置在N阱中。 第三和第四掺杂区域设置在P阱中。 阳极电连接到第一掺杂区域和第二掺杂区域，阴极电连接到第四掺杂区域。

公开(公告)号：US09325164B2

公开(公告)日：2016-04-26

申请号：US14492089

申请日：2014-09-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Tien-Hao Tang

IPC: H02H1/00 ,  H02H3/22 ,  H02H9/02 ,  H02H3/20 ,  H02H3/02

CPC classification number: H02H9/046

Abstract: An electrostatic discharge (ESD) protection device is disclosed. The ESD protection device comprises a trigger circuit, a switch, and an output buffer. When an ESD event occurs, the trigger circuit turns on the switch. One part of the current of the electrostatic discharge (ESD) event may be routed to a ground through the switch from the output buffer coupled to the output pad.

Abstract translation: 公开了一种静电放电（ESD）保护装置。 ESD保护装置包括触发电路，开关和输出缓冲器。 当发生ESD事件时，触发电路接通开关。 静电放电（ESD）事件的一部分电流可以通过开关从连接到输出板的输出缓冲器路由到地。

公开(公告)号：US20160087423A1

公开(公告)日：2016-03-24

申请号：US14492089

申请日：2014-09-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Tien-Hao Tang

IPC: H02H3/20 ,  H02H1/00 ,  H02H3/02

CPC classification number: H02H9/046

Abstract: An electrostatic discharge (ESD) protection device is disclosed. The ESD protection device comprises a trigger circuit, a switch, and an output buffer. When an ESD event occurs, the trigger circuit turns on the switch. One part of the current of the electrostatic discharge (ESD) event may be routed to a ground through the switch from the output buffer coupled to the output pad.

公开(公告)号：US09263562B2

公开(公告)日：2016-02-16

申请号：US14177228

申请日：2014-02-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Ya-Ting Lin ,  Tien-Hao Tang

IPC: H01L23/62 ,  H01L29/74 ,  H01L27/02 ,  H01L29/08 ,  H01L29/06

CPC classification number: H01L27/0262 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/402 ,  H01L29/7432 ,  H01L29/87

Abstract: An electrostatic discharge protection structure includes a first well, a second well disposed in the first well, a first and a second doped region disposed in the first well, a third and a fourth doped region disposed in the second well, a first electrode electrically connected to the first doped region and the second doped region, and a second electrode electrically connected to the fourth doped region.

Abstract translation: 静电放电保护结构包括第一阱，设置在第一阱中的第二阱，设置在第一阱中的第一和第二掺杂区，设置在第二阱中的第三和第四掺杂区，第一电极电连接 到第一掺杂区和第二掺杂区，以及电连接到第四掺杂区的第二电极。

公开(公告)号：US20150228771A1

公开(公告)日：2015-08-13

申请号：US14177228

申请日：2014-02-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lu-An Chen ,  Ya-Ting Lin ,  Tien-Hao Tang

IPC: H01L29/74 ,  H01L29/08 ,  H01L29/06 ,  H01L27/02

CPC classification number: H01L27/0262 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/402 ,  H01L29/7432 ,  H01L29/87

Abstract: An electrostatic discharge protection structure includes a first well, a second well disposed in the first well, a first and a second doped region disposed in the first well, a third and a fourth doped region disposed in the second well, a first electrode electrically connected to the first doped region and the second doped region, and a second electrode electrically connected to the fourth doped region.

Abstract translation: 静电放电保护结构包括第一阱，设置在第一阱中的第二阱，设置在第一阱中的第一和第二掺杂区，设置在第二阱中的第三和第四掺杂区，第一电极电连接 到第一掺杂区和第二掺杂区，以及电连接到第四掺杂区的第二电极。

公开(公告)号：US20140319613A1

公开(公告)日：2014-10-30

申请号：US13873261

申请日：2013-04-30

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yi-Ning He ,  Lu-An Chen ,  Tien-Hao Tang

IPC: H01L23/552

CPC classification number: H01L27/0248 ,  H01L27/0266 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7816

Abstract: A semiconductor device includes a substrate, a gate positioned on the substrate, a drain and a source formed in the substrate at respective two sides of the gate, and a doped region formed in the source. The drain and the source comprise a first conductivity type and the doped region comprises a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other.

Abstract translation: 半导体器件包括衬底，位于衬底上的栅极，在栅极的相应两侧在衬底中形成的漏极和源极以及形成在源极中的掺杂区域。 漏极和源极包括第一导电类型，并且掺杂区域包括第二导电类型。 第一导电类型和第二导电类型彼此互补。