公开(公告)号：US10103136B2

公开(公告)日：2018-10-16

申请号：US15464362

申请日：2017-03-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Jui Chen ,  Po-Ya Lai

IPC: H01L23/62 ,  H01L27/02 ,  H01L29/423 ,  H01L29/08 ,  H01L29/06 ,  H01L29/78

Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, at least a first doped region formed in the source region, and at least a second doped region formed in the drain region. The source region, the drain region and the second doped region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The second doped region is electrically connected to the first doped region. The gate set includes at least a first gate structure, a second gate structure, and a third gate structure.

公开(公告)号：US20180269198A1

公开(公告)日：2018-09-20

申请号：US15983113

申请日：2018-05-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Chen Chang

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L27/0255 ,  H01L27/027 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0873 ,  H01L29/78 ,  H01L29/7818 ,  H01L29/7831 ,  H01L29/7835

Abstract: An electrostatic discharge (ESD) protection device includes a substrate, a first gate group and a second gate group on the substrate, a drain region and a fourth doped region respectively at two sides of the first gate group, a source region and the fourth doped region respectively at two sides of the second gate group, a first doped region in the substrate and surrounded by the drain region, and a second doped region in the substrate and surrounded by the fourth doped region. The drain region and the source region have a first conductivity type. The first doped region and the second doped region have a second conductivity type complementary to the first conductivity type. The drain region is electrically connected to an input/output pad. The source region is electrically connected to a ground pad. The first doped region and the second doped region are electrically connected to each other.

公开(公告)号：US10008489B2

公开(公告)日：2018-06-26

申请号：US14724825

申请日：2015-05-29

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Chen Chang

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L27/0255 ,  H01L27/027 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0873 ,  H01L29/78 ,  H01L29/7818 ,  H01L29/7831 ,  H01L29/7835

Abstract: An electrostatic discharge protection semiconductor device includes a substrate, a gate set positioned on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, at least a first doped region formed in the drain region, and at least a second doped region formed in the substrate. The source region and the drain region include a first conductivity type, the first doped region and the second doped region include a second conductivity type, and the first conductivity and the second conductivity type are complementary to each other. The first doped region and the second doped region are electrically connected to each other.

公开(公告)号：US20180012882A1

公开(公告)日：2018-01-11

申请号：US15247134

申请日：2016-08-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Hou-Jen Chiu ,  Tien-Hao Tang

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/08 ,  H01L29/78 ,  H01L29/06

Abstract: A semiconductor structure for electrostatic discharge (ESD) protection is provided. The semiconductor structure includes a substrate, a first doped well, a source doped region, a drain doped region, and a gate structure. The first doped well is disposed in the substrate and has a first conductive type. The source doped region is disposed in the substrate and has a second conductive type opposite to the first conductive type. The drain doped region is disposed in the substrate and has the second conductive type. The gate structure is disposed on the substrate and between the source doped region and the drain doped region. The gate structure is separated from the source doped region.

公开(公告)号：US09673189B2

公开(公告)日：2017-06-06

申请号：US14924975

申请日：2015-10-28

Applicant: United Microelectronics Corp.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Jui Chen ,  Po-Ya Lai

IPC: H01L27/02

CPC classification number: H01L27/0262 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/7436 ,  H01L29/861

Abstract: An electrostatic discharge (ESD) unit is described, including a first device, and a second device coupled to the first device in parallel. In an ESD event, the first device is turned on before the second device is turned on. The second device may be turned on by the turned-on first device to form an ESD path in the ESD event.

公开(公告)号：US20200235088A1

公开(公告)日：2020-07-23

申请号：US16844986

申请日：2020-04-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Jui Chen ,  Po-Ya Lai

IPC: H01L27/02 ,  H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423

Abstract: An ESD protection semiconductor device includes a substrate. A gate set disposed on the substrate. A plurality of source fins and a plurality of drain fins having a first conductivity type are disposed in the substrate respectively at two sides of the gate set. A first doped fin is disposed in the substrate and positioned in between the source fins and spaced apart from the source fins. The first doped fin comprises a second conductivity type that is complementary to the first conductivity type. A second doped fin is formed in one of the drain fins and isolated from the one of the drain fins by an isolation structure. The second doped fin is electrically connected to the first doped fin.

公开(公告)号：US20180138167A1

公开(公告)日：2018-05-17

申请号：US15353348

申请日：2016-11-16

Applicant: United Microelectronics Corp.

Inventor： Chung-Yu Huang ,  Ping-Chen Chang ,  Hou-Jen Chiu

IPC: H01L27/02 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L27/0285 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/1083 ,  H01L29/66575

Abstract: An electrostatic discharge (ESD) device includes a gate structure, disposed on a substrate. A drain doped region of a first conductive type is in the substrate, adjacent to a first side of the gate structure, wherein the drain doped region has a first impurity concentration. A first doped region of the first conductive type is disposed within the drain doped region and being at least distant from the gate structure by a distance. The first doped region has a second impurity concentration lower than the first impurity concentration.

公开(公告)号：US20170221876A1

公开(公告)日：2017-08-03

申请号：US15484143

申请日：2017-04-11

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Jui Chen ,  Po-Ya Lai

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/0255 ,  H01L27/0207 ,  H01L27/027 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/7819 ,  H01L29/7831 ,  H01L29/7835 ,  H01L29/785 ,  H01L29/7851

Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, and at least a doped region formed in the source region. The source region and the drain region include a first conductivity type, and the doped region includes a second conductivity type complementary to the first conductivity type. The doped region is electrically connected to a ground potential.

公开(公告)号：US09716087B1

公开(公告)日：2017-07-25

申请号：US15257933

申请日：2016-09-07

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Tien-Hao Tang

IPC: H01L27/02

CPC classification number: H01L27/0262

Abstract: An electrostatic discharge protection semiconductor device includes a substrate, a first well formed in the substrate, a second well formed in the substrate and spaced apart from the first well, a gate formed on the substrate and positioned in between the first well and the second well, a drain region formed in the first well, a source region formed in the second well, a first doped region formed in the first well and adjacent to the drain region, and a second doped region formed in the first well and spaced apart from both the first doped region and the gate. The first well, the drain region, and the source region include a first conductivity type, the second well, the first doped region and the second doped region include a second conductivity type, and the first conductivity type and the second conductivity type are complementary to each other.

公开(公告)号：US20170110446A1

公开(公告)日：2017-04-20

申请号：US14938850

申请日：2015-11-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chung-Yu Huang ,  Kuan-Cheng Su ,  Tien-Hao Tang ,  Ping-Jui Chen ,  Po-Ya Lai

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L27/0255 ,  H01L27/0207 ,  H01L27/027 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/7819 ,  H01L29/7831 ,  H01L29/7835 ,  H01L29/785 ,  H01L29/7851

Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, and at least a first doped region formed in the drain region. The source region and the drain region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The first doped region is electrically connected to a ground potential.