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公开(公告)号：US09632808B2
公开(公告)日：2017-04-25
申请号：US14273022
申请日：2014-05-08
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Carl A. Waldspurger
CPC classification number: G06F9/45533 , G06F9/45545 , G06F9/45558 , G06F9/46 , G06F9/485 , G06F9/4881 , G06F9/522 , G06F2009/4557 , G06F2009/45575
Abstract: Techniques for implicit coscheduling of CPUs to improve corun performance of scheduled contexts are described. One technique minimizes skew by implementing corun migrations, and another technique minimizes skew by implementing a corun bonus mechanism. Skew between schedulable contexts may be calculated based on guest progress, where guest progress represents time spent executing guest operating system and guest application code. A non-linear skew catch-up algorithm is described that adjusts the progress of a context when the progress falls far behind its sibling contexts.
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公开(公告)号：US20160085571A1
公开(公告)日：2016-03-24
申请号：US14492051
申请日：2014-09-21
Applicant: VMware, Inc.
Inventor： Seongbeom Kim , Haoqiang Zheng , Rajesh Venkatasubramanian , Puneet Zaroo
IPC: G06F9/455
CPC classification number: G06F9/45558 , G06F9/45554 , G06F9/48 , G06F2009/4557 , G06F2009/45583
Abstract: Examples perform selection of non-uniform memory access (NUMA) nodes for mapping of virtual central processing unit (vCPU) operations to physical processors. A CPU scheduler evaluates the latency between various candidate processors and the memory associated with the vCPU, and the size of the working set of the associated memory, and the vCPU scheduler selects an optimal processor for execution of a vCPU based on the expected memory access latency and the characteristics of the vCPU and the processors. Some examples contemplate monitoring system characteristics and rescheduling the vCPUs when other placements may provide improved performance and/or efficiency.
Abstract translation: 示例执行非均匀存储器访问（NUMA）节点的选择，用于将虚拟中央处理单元（vCPU）操作映射到物理处理器。 CPU调度器评估各种候选处理器与与vCPU相关联的存储器之间的延迟以及相关联存储器的工作集合的大小，并且vCPU调度器基于预期的存储器访问延迟选择用于执行vCPU的最优处理器 以及vCPU和处理器的特性。 一些示例考虑监视系统特性并重新安排vCPU，当其他布局可能提供改进的性能和/或效率时。
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公开(公告)号：US11934890B2
公开(公告)日：2024-03-19
申请号：US17378381
申请日：2021-07-16
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Xunjia Lu
CPC classification number: G06F9/526 , G06F9/45558 , G06F11/3024 , G06F11/3409 , G06F2009/4557
Abstract: An example method of managing exclusive affinity for threads executing in a virtualized computing system includes: determining, by an exclusive affinity monitor executing in a hypervisor of the virtualized computing system, a set of threads eligible for exclusive affinity; determining, by the exclusive affinity monitor, for each thread in the set of threads, impact on performance of the threads for granting each thread exclusive affinity; and granting, for each thread of the set of threads having an impact on performance of the threads less than a threshold, exclusive affinity to respective physical central processing units (PCPUs) of the virtualized computing system.
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14.发明授权公开(公告)号：US11687356B2
公开(公告)日：2023-06-27
申请号：US17013277
申请日：2020-09-04
Applicant: VMware, Inc.
Inventor： Xunjia Lu , Bi Wu , Petr Vandrovec , Haoqiang Zheng
CPC classification number: G06F9/45558 , G06F9/44505 , G06F9/5077 , G06F12/0238 , G06F2009/45583 , G06F2009/45591 , G06F2209/5022 , G06F2212/2542
Abstract: Techniques for concurrently supporting virtual non-uniform memory access (virtual NUMA) and CPU/memory hot-add in a virtual machine (VM) are provided. In one set of embodiments, a hypervisor of a host system can compute a node size for a virtual NUMA topology of the VM, where the node size indicates a maximum number of virtual central processing units (vCPUs) and a maximum amount of memory to be included in each virtual NUMA node. The hypervisor can further build and expose the virtual NUMA topology to the VM. Then, at a time of receiving a request to hot-add a new vCPU or memory region to the VM, the hypervisor can check whether all existing nodes in the virtual NUMA topology have reached the maximum number of vCPUs or maximum amount of memory, per the computed node size. If so, the hypervisor can create a new node with the new vCPU or memory region and add the new node to the virtual NUMA topology.
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公开(公告)号：US11429424B2
公开(公告)日：2022-08-30
申请号：US16936289
申请日：2020-07-22
Applicant: VMware, Inc.
Inventor： Xunjia Lu , Haoqiang Zheng
Abstract: A method of selectively assigning virtual CPUs (vCPUs) of a virtual machine (VM) to physical CPUs (pCPUs), where execution of the VM is supported by a hypervisor running on a hardware platform including the pCPUs, includes determining that a first vCPU of the vCPUs is scheduled to execute a latency-sensitive workload of the VM and a second vCPU of the vCPUs is scheduled to execute a non-latency-sensitive workload of the VM and assigning the first vCPU to a first pCPU of the pCPUs and the second vCPU to a second pCPU of the pCPUs. A kernel component of the hypervisor pins the assignment of the first vCPU to the first pCPU and does not pin the assignment of the second vCPU to the second pCPU. The method further comprises selectively tagging or not tagging by a user or an automated tool, a plurality of workloads of the VM as latency-sensitive.
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Patent Agency Ranking
公开(公告)号：US20210211492A1
公开(公告)日：2021-07-08
申请号：US17208284
申请日：2021-03-22
Applicant: VMware, Inc.
Inventor： Badhrinath Sampathkumar , Zhelong Pan , Haoqiang Zheng , Fei Guo , Sabareesh Subramaniam
Abstract: Load balancing across hosts in a computer system is triggered based on pairwise comparisons of resource utilization at different host. A method for load balancing across hosts includes the steps of determining a resource utilization difference between first and second hosts, wherein the first host has a higher resource utilization than the second host, comparing the resource utilization difference against a threshold difference, and upon determining that the resource utilization difference exceeds the threshold difference, selecting a workload executing in the first host for migration to the second host.
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公开(公告)号：US10572282B2
公开(公告)日：2020-02-25
申请号：US15494170
申请日：2017-04-21
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Carl A. Waldspurger
Abstract: Techniques for implicit coscheduling of CPUs to improve corun performance of scheduled contexts are described. One technique minimizes skew by implementing corun migrations, and another technique minimizes skew by implementing a corun bonus mechanism. Skew between schedulable contexts may be calculated based on guest progress, where guest progress represents time spent executing guest operating system and guest application code. A non-linear skew catch-up algorithm is described that adjusts the progress of a context when the progress falls far behind its sibling contexts.
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公开(公告)号：US10452572B2
公开(公告)日：2019-10-22
申请号：US15381067
申请日：2016-12-15
Applicant: VMware, Inc.
Inventor： Xunjia Lu , Haoqiang Zheng
Abstract: An approach for providing low-latency and fast response times required by virtual machine (VM) telecommunication (telco) workloads is disclosed. In one embodiment, a kernel scheduler identifies hypervisor system contexts that are outside of traditional virtual central processing unit (CPU) contexts and servicing telco workloads. The scheduler grants each such context exclusive affinity to a respective physical CPU, up to a configurable maximum number of such grants. The scheduler also increases the CPU reservations in a system resource pool for the hypervisor by one CPU, indicating that there is one fewer physical CPU on which VMs may be placed or moved. The exclusive affinities and CPU reservations may be dynamically adjusted as, e.g., new latency-sensitive VMs are powered on with virtual CPUs that need to be granted exclusive affinity to physical CPUs or contexts no longer relevant to telco workloads are demoted to not have exclusive affinity to physical CPUs.
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公开(公告)号：US10255091B2
公开(公告)日：2019-04-09
申请号：US14492051
申请日：2014-09-21
Applicant: VMware, Inc.
Inventor： Seongbeom Kim , Haoqiang Zheng , Rajesh Venkatasubramanian , Puneet Zaroo
Abstract: Systems and methods for performing selection of non-uniform memory access (NUMA) nodes for mapping of virtual central processing unit (vCPU) operations to physical processors are provided. A CPU scheduler evaluates the latency between various candidate processors and the memory associated with the vCPU, and the size of the working set of the associated memory, and the vCPU scheduler selects an optimal processor for execution of a vCPU based on the expected memory access latency and the characteristics of the vCPU and the processors. The systems and methods further provide for monitoring system characteristics and rescheduling the vCPUs when other placements provide improved performance and efficiency.
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公开(公告)号：US10061610B2
公开(公告)日：2018-08-28
申请号：US15592957
申请日：2017-05-11
Applicant: VMware, Inc.
Inventor： Haoqiang Zheng , Lenin Singaravelu , Shilpi Agarwal , Daniel Michael Hecht , Garrett Smith
CPC classification number: G06F9/45558 , G06F9/45533 , G06F9/4812 , G06F9/4887 , G06F9/50 , G06F9/5027 , G06F9/5033 , G06F9/5088 , G06F13/24 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591 , G06F2209/5017 , H04L43/0894 , H04L43/16 , H04L47/56 , H04L47/801
Abstract: A host computer has one or more physical central processing units (CPUs) that support the execution of a plurality of containers, where the containers each include one or more processes. Each process of a container is assigned to execute exclusively on a corresponding physical CPU when the corresponding container is determined to be latency sensitive. The assignment of a process to execute exclusively on a corresponding physical CPU includes the migration of tasks from the corresponding physical CPU to one or more other physical CPUs of the host system, and the directing of task and interrupt processing to the one or more other physical CPUs. Tasks of of the process corresponding to the container are then executed on the corresponding physical CPU.
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