公开(公告)号：US5485307A

公开(公告)日：1996-01-16

申请号：US191062

申请日：1994-02-02

申请人： Byung-Sun Kim

发明人： Byung-Sun Kim

IPC分类号： G02B23/02 ,  G02B23/18 ,  G02B25/00 ,  G02B23/00

CPC分类号： G02B25/001 ,  G02B23/02 ,  G02B23/18

摘要： A binocular includes an eye-piece tube, a first lens system associated with the eye-piece tube for providing a base magnification as seen through the eye-piece tube, and an eye-piece module having a second lens system therein which is interchangeably installed in the eye piece tube for changing the position of the first lens system to a position of a preset increase in magnification.

摘要翻译： 双目镜包括眼管，与眼片管相关联的第一透镜系统，用于提供通过眼片管观察到的基部放大率，以及具有可互换安装的第二透镜系统的眼部模块 在用于将第一透镜系统的位置改变为预设增大放大率的位置的眼用管中。

公开(公告)号：US08772652B2

公开(公告)日：2014-07-08

申请号：US13117268

申请日：2011-05-27

申请人： Byung-Sun Kim ,  Min-Su Jung ,  Cheol-Hee Kim

发明人： Byung-Sun Kim ,  Min-Su Jung ,  Cheol-Hee Kim

IPC分类号： H01H9/26

CPC分类号： H01H13/705 ,  H01H2221/056 ,  H01H2223/036 ,  H01H2231/022 ,  H01H2233/03 ,  H04M1/23

摘要： A keypad assembly includes an operation member deformed according to user's manipulation to operate key switches, a binding member disposed on a top surface of the operation member, binding pieces extending and bent from the binding member to enclose sides of the operation member on an edge of the binding member, and a manipulation member disposed on a top surface of the binding member, the manipulation member including at least one key tops, in which the binding members are bound onto inner side walls of a housing of the portable terminal.

摘要翻译： 键盘组件包括根据用户的操纵而变形以操作键开关的操作构件，设置在操作构件的顶表面上的装订构件，从装订构件延伸和弯曲的绑定件，以将操作构件的侧面包围在操作构件的边缘上 装订构件和设置在装订构件的顶表面上的操纵构件，操纵构件包括至少一个键顶，其中装订构件被绑定到便携式终端的壳体的内侧壁上。

公开(公告)号：US08587045B2

公开(公告)日：2013-11-19

申请号：US13181700

申请日：2011-07-13

申请人： Oh-Kyum Kwon ,  Tae-Jung Lee ,  Kyoung-Eun Uhn ,  Byung-Sun Kim

发明人： Oh-Kyum Kwon ,  Tae-Jung Lee ,  Kyoung-Eun Uhn ,  Byung-Sun Kim

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L29/78 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11529 ,  H01L27/11558 ,  H01L29/94

摘要： A nonvolatile memory device has a first active region and a second active region defined in a substrate by a device isolation layer, a Metal Oxide Silicon Field-Effect Transistor (MOSFET) disposed on the first active region and including a first electrode pattern, and a Metal Oxide Silicon (MOS) capacitor disposed on the second active region and including a second electrode pattern, and in which the first electrode pattern is narrower in the widthwise direction of the channel of the MOSFET than the first active region.

公开(公告)号：US20130208090A1

公开(公告)日：2013-08-15

申请号：US13881141

申请日：2010-10-26

申请人： Keun-Sik Lee ,  Byung-Sun Kim ,  Chang-Seob Park ,  Sang-Jin Hahm ,  In-Joon Cho ,  Jun-Yong Lee

发明人： Keun-Sik Lee ,  Byung-Sun Kim ,  Chang-Seob Park ,  Sang-Jin Hahm ,  In-Joon Cho ,  Jun-Yong Lee

IPC分类号： H04N13/00

CPC分类号： H04N13/194 ,  H04N13/161 ,  H04N13/167 ,  H04N21/4622 ,  H04N21/631 ,  H04N21/816

摘要： Disclosed are a hierarchical broadcasting system and method for 3D broadcasting. A hierarchical 3D image broadcasting method comprises: allowing a broadcast transmission system to transmit first broadcast data for an existing broadcast to a broadcast reception system via a first communication network; and allowing the broadcast transmission system to transmit second broadcast data for 3D image broadcasting to the broadcast reception system via a second communication network. At this point, the broadcast reception system enables the first and second broadcast data to be combined in order to display a 3D image broadcast.

摘要翻译： 公开了一种用于3D广播的分级广播系统和方法。 分层3D图像广播方法包括：允许广播传输系统经由第一通信网络向广播接收系统发送用于现有广播的第一广播数据; 并且允许广播传输系统经由第二通信网络向广播接收系统发送用于3D图像广播的第二广播数据。 此时，广播接收系统能够组合第一和第二广播数据，以便显示3D图像广播。

公开(公告)号：US20080035986A1

公开(公告)日：2008-02-14

申请号：US11834129

申请日：2007-08-06

申请人： Sang-Soo Kim ,  Byung-Sun Kim

发明人： Sang-Soo Kim ,  Byung-Sun Kim

IPC分类号： H01L29/792

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11546

摘要： A method of fabricating a semiconductor device having a non-volatile memory cell includes forming an insulation layer as an uppermost/outermost portion of the memory cell to enhance the charge retention capability of the memory cell. The insulation layer is formed after the gate structure and integrate dielectric of the non-volatile memory cell, and a gate of a logic transistor are formed. The insulation layer thus enhances the function of the intergate dielectric. Subsequently, a conductive layer is formed on the substrate including over the gate of the logic transistor. A silicide layer is then formed on the gate of the logic transistor and on the substrate adjacent opposite sides of the gate. The insulation layer thus also serves prevent the formation of a silicide layer on the non-volatile memory cell.

摘要翻译： 制造具有非易失性存储单元的半导体器件的方法包括形成作为存储单元的最上部/最外部的绝缘层，以提高存储单元的电荷保持能力。 在栅极结构之后形成绝缘层并且整合非易失性存储单元的电介质，并且形成逻辑晶体管的栅极。 因此，绝缘层增强了隔间电介质的功能。 随后，在包括在逻辑晶体管的栅极上的衬底上形成导电层。 然后在逻辑晶体管的栅极上和邻近栅极的相对侧的衬底上形成硅化物层。 因此，绝缘层也用于防止在非易失性存储单元上形成硅化物层。

公开(公告)号：US5206758A

公开(公告)日：1993-04-27

申请号：US887250

申请日：1992-05-19

申请人： Byung-Sun Kim ,  Rudolf Bresser

发明人： Byung-Sun Kim ,  Rudolf Bresser

IPC分类号： G02B7/12 ,  G02B23/18

CPC分类号： G02B7/12 ,  G02B23/18

摘要： A pair of binoculars in which the ocular abridgements are connected through a bridge and can be activated through a center drive. The center drive comprises a rotatable knurled element and a guide pin, whereby the center drive serves customary adjustment of the focus. A Fix-Focus-Adjustment is provided by a knurled ring of the guide pin, whereby conventional focus adjustment is released by way of a knurled ring and the stop is neutralized with a stop ring.

摘要翻译： 一对双筒望远镜，其中眼睛接近通过桥连接并且可以通过中心驱动器被激活。 中心驱动器包括可旋转的滚花元件和引导销，由此中心驱动器提供对焦点的常规调整。 固定对焦调整由导向销的滚花环提供，由此通过滚花环释放常规的焦点调节，并且用止动环中和止动件。

公开(公告)号：US07276862B2

公开(公告)日：2007-10-02

申请号：US11317708

申请日：2005-12-22

申请人： Byung-Sun Kim ,  Kyung-Soo Seok

发明人： Byung-Sun Kim ,  Kyung-Soo Seok

IPC分类号： G05F1/00

CPC分类号： H05B41/288 ,  Y10S315/04 ,  Y10S315/05

摘要： A stabilizer circuit for a high-voltage discharge lamp is provided. The stabilizer comprises an electromagnetic interference (EMI) filter; a rectifying unit; a power factor correction (PFC) circuit; a buck converter; a commutator; an igniter; a high-voltage discharge lamp; a current detector; a voltage detector; an igniter voltage controller for receiving the voltage output from the igniter and controlling the voltage when abnormality in the high-voltage discharge lamp occurs.

摘要翻译： 提供了一种用于高压放电灯的稳定电路。 稳定器包括电磁干扰（EMI）滤波器; 整流单元 功率因数校正（PFC）电路; 降压转换器; 换向器 点火器 高压放电灯; 电流检测器; 电压检测器; 点火器电压控制器，用于接收从点火器输出的电压并且在高压放电灯中发生异常时控制电压。

公开(公告)号：US07271059B2

公开(公告)日：2007-09-18

申请号：US11048845

申请日：2005-02-03

申请人： Sang-Soo Kim ,  Byung-Sun Kim

发明人： Sang-Soo Kim ,  Byung-Sun Kim

IPC分类号： H01L21/336

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11546

摘要： A method of fabricating a semiconductor device having a non-volatile memory cell includes forming an insulation layer as an uppermost/outermost portion of the memory cell to enhance the charge retention capability of the memory cell. The insulation layer is formed after the gate structure and integrate dielectric of the non-volatile memory cell, and a gate of a logic transistor are formed. The insulation layer thus enhances the function of the intergrate dielectric. Subsequently, a conductive layer is formed on the substrate including over the gate of the logic transistor. A silicide layer is then formed on the gate of the logic transistor and on the substrate adjacent opposite sides of the gate. The insulation layer thus also serves prevent the formation of a silicide layer on the non-volatile memory cell.

摘要翻译： 制造具有非易失性存储单元的半导体器件的方法包括形成作为存储单元的最上部/最外部的绝缘层，以提高存储单元的电荷保持能力。 在栅极结构之后形成绝缘层并且整合非易失性存储单元的电介质，并且形成逻辑晶体管的栅极。 因此，绝缘层增强了集成电介质的功能。 随后，在包括在逻辑晶体管的栅极上的衬底上形成导电层。 然后在逻辑晶体管的栅极上和邻近栅极的相对侧的衬底上形成硅化物层。 因此，绝缘层也用于防止在非易失性存储单元上形成硅化物层。

公开(公告)号：US07120080B2

公开(公告)日：2006-10-10

申请号：US10751178

申请日：2004-01-02

申请人： Tae-Jung Lee ,  Byung-Sun Kim ,  Joon-Hyung Lee

发明人： Tae-Jung Lee ,  Byung-Sun Kim ,  Joon-Hyung Lee

IPC分类号： G11C8/00 ,  G11C5/06 ,  G11C11/00 ,  G06F12/00 ,  G06F13/28

CPC分类号： H01L27/1104 ,  G09G3/3611 ,  G11C7/02 ,  G11C8/16 ,  G11C11/4125 ,  H01L27/11

摘要： A dual port semiconductor memory device, including PMOS scan transistors, is provided. The dual port semiconductor memory device includes two PMOS transistors, two NMOS pull-down transistors, two NMOS pass transistors, and a PMOS scan transistor. The scan transistor being PMOS, noise margins can be improved. In addition, these seven transistors are arranged in two n-wells and 2 p-wells, while n-wells and p-wells are arranged in series and in alternating fashion. Therefore, the length of a memory cell along the minor axis of the memory cell is relatively short. This memory cell layout helps shorten the length of a bit line by arranging a pair of bitlines in parallel with well boundaries, i.e., in the direction of the short axis of the memory cell, and makes it possible to prevent crosstalk between a bitline and a complementary bitline by arranging conductive lines between the bitline and the complementary bitline.

摘要翻译： 提供了包括PMOS扫描晶体管的双端口半导体存储器件。 双端口半导体存储器件包括两个PMOS晶体管，两个NMOS下拉晶体管，两个NMOS传输晶体管和PMOS扫描晶体管。 作为PMOS的扫描晶体管，可以提高噪声容限。 此外，这七个晶体管排列在两个n阱和2个p阱中，而n阱和p阱以串联和交替的方式排列。 因此，沿着存储单元的短轴的存储单元的长度相对较短。 该存储单元布局通过将一对位线与阱边界并排布置，即在存储单元的短轴方向上有助于缩短位线的长度，并且可以防止位线与位线之间的串扰 通过在位线和互补位线之间布置导线来补充位线。

公开(公告)号：US20050173753A1

公开(公告)日：2005-08-11

申请号：US11048845

申请日：2005-02-03

申请人： Sang-Soo Kim ,  Byung-Sun Kim

发明人： Sang-Soo Kim ,  Byung-Sun Kim

IPC分类号： H01L29/78 ,  H01L21/8239 ,  H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11546

摘要： A method of fabricating a semiconductor device having a non-volatile memory cell includes forming an insulation layer as an uppermost/outermost portion of the memory cell to enhance the charge retention capability of the memory cell. The insulation layer is formed after the gate structure and integrate dielectric of the non-volatile memory cell, and a gate of a logic transistor are formed. The insulation layer thus enhances the function of the intergate dielectric. Subsequently, a conductive layer is formed on the substrate including over the gate of the logic transistor. A silicide layer is then formed on the gate of the logic transistor and on the substrate adjacent opposite sides of the gate. The insulation layer thus also serves prevent the formation of a silicide layer on the non-volatile memory cell.

摘要翻译： 制造具有非易失性存储单元的半导体器件的方法包括形成作为存储单元的最上部/最外部的绝缘层，以提高存储单元的电荷保持能力。 在栅极结构之后形成绝缘层并且整合非易失性存储单元的电介质，并且形成逻辑晶体管的栅极。 因此，绝缘层增强了隔间电介质的功能。 随后，在包括在逻辑晶体管的栅极上的衬底上形成导电层。 然后在逻辑晶体管的栅极上和邻近栅极的相对侧的衬底上形成硅化物层。 因此，绝缘层也用于防止在非易失性存储单元上形成硅化物层。